cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

fsl,s32-linflexuart.yaml (1058B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/serial/fsl,s32-linflexuart.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale LINFlexD UART
      8
      9description: |
     10  The LINFlexD controller implements several LIN protocol versions, as well
     11  as support for full-duplex UART communication through 8-bit and 9-bit
     12  frames. See chapter 47 ("LINFlexD") in the reference manual
     13  https://www.nxp.com/webapp/Download?colCode=S32V234RM.
     14
     15maintainers:
     16  - Chester Lin <clin@suse.com>
     17
     18allOf:
     19  - $ref: "serial.yaml"
     20
     21properties:
     22  compatible:
     23    oneOf:
     24      - const: fsl,s32v234-linflexuart
     25      - items:
     26          - const: nxp,s32g2-linflexuart
     27          - const: fsl,s32v234-linflexuart
     28
     29  reg:
     30    maxItems: 1
     31
     32  interrupts:
     33    maxItems: 1
     34
     35required:
     36  - compatible
     37  - reg
     38  - interrupts
     39
     40unevaluatedProperties: false
     41
     42examples:
     43  - |
     44    serial@40053000 {
     45        compatible = "fsl,s32v234-linflexuart";
     46        reg = <0x40053000 0x1000>;
     47        interrupts = <0 59 4>;
     48    };