cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-imx-uart.yaml (3033B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
      8
      9maintainers:
     10  - Fabio Estevam <festevam@gmail.com>
     11
     12allOf:
     13  - $ref: "serial.yaml"
     14  - $ref: "rs485.yaml"
     15
     16properties:
     17  compatible:
     18    oneOf:
     19      - const: fsl,imx1-uart
     20      - const: fsl,imx21-uart
     21      - items:
     22          - enum:
     23              - fsl,imx25-uart
     24              - fsl,imx27-uart
     25              - fsl,imx31-uart
     26              - fsl,imx35-uart
     27              - fsl,imx50-uart
     28              - fsl,imx51-uart
     29              - fsl,imx53-uart
     30              - fsl,imx6q-uart
     31          - const: fsl,imx21-uart
     32      - items:
     33          - enum:
     34              - fsl,imx6sl-uart
     35              - fsl,imx6sll-uart
     36              - fsl,imx6sx-uart
     37          - const: fsl,imx6q-uart
     38          - const: fsl,imx21-uart
     39      - items:
     40          - enum:
     41              - fsl,imx6ul-uart
     42              - fsl,imx7d-uart
     43              - fsl,imx8mm-uart
     44              - fsl,imx8mn-uart
     45              - fsl,imx8mp-uart
     46              - fsl,imx8mq-uart
     47          - const: fsl,imx6q-uart
     48
     49  reg:
     50    maxItems: 1
     51
     52  interrupts:
     53    maxItems: 1
     54
     55  fsl,dte-mode:
     56    $ref: /schemas/types.yaml#/definitions/flag
     57    description: |
     58      Indicate the uart works in DTE mode. The uart works in DCE mode by default.
     59
     60  fsl,inverted-tx:
     61    $ref: /schemas/types.yaml#/definitions/flag
     62    description: |
     63      Indicate that the hardware attached to the peripheral inverts the signal
     64      transmitted, and that the peripheral should invert its output using the
     65      INVT registers.
     66
     67  fsl,inverted-rx:
     68    $ref: /schemas/types.yaml#/definitions/flag
     69    description: |
     70      Indicate that the hardware attached to the peripheral inverts the signal
     71      received, and that the peripheral should invert its input using the
     72      INVR registers.
     73
     74  fsl,dma-info:
     75    $ref: /schemas/types.yaml#/definitions/uint32-array
     76    minItems: 2
     77    maxItems: 2
     78    description: |
     79      First cell contains the size of DMA buffer chunks, second cell contains
     80      the amount of chunks used for the device. Multiplying both numbers is
     81      the total size of memory used for receiving data.
     82      When not being configured the system will use default settings, which
     83      are sensible for most use cases. If you need low latency processing on
     84      slow connections this needs to be configured appropriately.
     85
     86  uart-has-rtscts: true
     87
     88  rs485-rts-delay: true
     89  rs485-rts-active-low: true
     90  rs485-rx-during-tx: true
     91  linux,rs485-enabled-at-boot-time: true
     92
     93required:
     94  - compatible
     95  - reg
     96  - interrupts
     97
     98unevaluatedProperties: false
     99
    100examples:
    101  - |
    102    aliases {
    103        serial0 = &uart1;
    104    };
    105
    106    uart1: serial@73fbc000 {
    107        compatible = "fsl,imx51-uart", "fsl,imx21-uart";
    108        reg = <0x73fbc000 0x4000>;
    109        interrupts = <31>;
    110        uart-has-rtscts;
    111        fsl,dte-mode;
    112    };