cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-lpuart.yaml (1848B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
      8
      9maintainers:
     10  - Fugang Duan <fugang.duan@nxp.com>
     11
     12allOf:
     13  - $ref: "rs485.yaml"
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - enum:
     19          - fsl,vf610-lpuart
     20          - fsl,ls1021a-lpuart
     21          - fsl,ls1028a-lpuart
     22          - fsl,imx7ulp-lpuart
     23          - fsl,imx8qxp-lpuart
     24          - fsl,imxrt1050-lpuart
     25      - items:
     26          - enum:
     27              - fsl,imx93-lpuart
     28              - fsl,imx8ulp-lpuart
     29          - const: fsl,imx7ulp-lpuart
     30      - items:
     31          - enum:
     32              - fsl,imx8qm-lpuart
     33              - fsl,imx8dxl-lpuart
     34          - const: fsl,imx8qxp-lpuart
     35
     36  reg:
     37    maxItems: 1
     38
     39  interrupts:
     40    maxItems: 1
     41
     42  clocks:
     43    items:
     44      - description: ipg clock
     45      - description: baud clock
     46    minItems: 1
     47
     48  clock-names:
     49    items:
     50      - const: ipg
     51      - const: baud
     52    minItems: 1
     53
     54  dmas:
     55    items:
     56      - description: DMA controller phandle and request line for RX
     57      - description: DMA controller phandle and request line for TX
     58
     59  dma-names:
     60    items:
     61      - const: rx
     62      - const: tx
     63
     64  rs485-rts-active-low: true
     65  linux,rs485-enabled-at-boot-time: true
     66
     67required:
     68  - compatible
     69  - reg
     70  - interrupts
     71  - clocks
     72  - clock-names
     73
     74unevaluatedProperties: false
     75
     76examples:
     77  - |
     78    #include <dt-bindings/clock/vf610-clock.h>
     79
     80    serial@40027000 {
     81        compatible = "fsl,vf610-lpuart";
     82        reg = <0x40027000 0x1000>;
     83        interrupts = <0 61 0x00>;
     84        clocks = <&clks VF610_CLK_UART0>;
     85        clock-names = "ipg";
     86        dmas = <&edma0 0 2>, <&edma0 0 3>;
     87        dma-names = "rx","tx";
     88    };