cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-mxs-auart.yaml (1590B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale MXS Application UART (AUART)
      8
      9maintainers:
     10  - Fabio Estevam <festevam@gmail.com>
     11
     12allOf:
     13  - $ref: "serial.yaml"
     14
     15properties:
     16  compatible:
     17    enum:
     18      - fsl,imx23-auart
     19      - fsl,imx28-auart
     20      - alphascale,asm9260-auart
     21
     22  reg:
     23    maxItems: 1
     24
     25  interrupts:
     26    maxItems: 1
     27
     28  dmas:
     29    items:
     30      - description: DMA controller phandle and request line for RX
     31      - description: DMA controller phandle and request line for TX
     32
     33  dma-names:
     34    items:
     35      - const: rx
     36      - const: tx
     37
     38  clocks:
     39    items:
     40      - description: mod clock
     41      - description: ahb clock
     42    minItems: 1
     43
     44  clock-names:
     45    items:
     46      - const: mod
     47      - const: ahb
     48    minItems: 1
     49
     50  uart-has-rtscts: true
     51  rts-gpios: true
     52  cts-gpios: true
     53  dtr-gpios: true
     54  dsr-gpios: true
     55  rng-gpios: true
     56  dcd-gpios: true
     57
     58if:
     59  properties:
     60    compatible:
     61      contains:
     62        enum:
     63          - alphascale,asm9260-auart
     64then:
     65  required:
     66    - clocks
     67    - clock-names
     68
     69required:
     70  - compatible
     71  - reg
     72  - interrupts
     73  - dmas
     74  - dma-names
     75
     76unevaluatedProperties: false
     77
     78examples:
     79  - |
     80    aliases {
     81        serial0 = &auart0;
     82    };
     83
     84    auart0: serial@8006a000 {
     85        compatible = "fsl,imx28-auart";
     86        reg = <0x8006a000 0x2000>;
     87        interrupts = <112>;
     88        dmas = <&dma_apbx 8>, <&dma_apbx 9>;
     89        dma-names = "rx", "tx";
     90        clocks = <&clks 45>;
     91    };