cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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milbeaut-uart.txt (589B)

      1Socionext Milbeaut UART controller
      2
      3Required properties:
      4- compatible: should be "socionext,milbeaut-usio-uart".
      5- reg: offset and length of the register set for the device.
      6- interrupts: two interrupts specifier.
      7- interrupt-names: should be "rx", "tx".
      8- clocks: phandle to the input clock.
      9
     10Optional properties:
     11- auto-flow-control: flow control enable.
     12
     13Example:
     14	usio1: usio_uart@1e700010 {
     15		compatible = "socionext,milbeaut-usio-uart";
     16		reg = <0x1e700010 0x10>;
     17		interrupts = <0 141 0x4>, <0 149 0x4>;
     18		interrupt-names = "rx", "tx";
     19		clocks = <&clk 2>;
     20		auto-flow-control;
     21	};