cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

nxp,sc16is7xx.txt (2463B)

      1* NXP SC16IS7xx advanced Universal Asynchronous Receiver-Transmitter (UART)
      2* i2c as bus
      3
      4Required properties:
      5- compatible: Should be one of the following:
      6  - "nxp,sc16is740" for NXP SC16IS740,
      7  - "nxp,sc16is741" for NXP SC16IS741,
      8  - "nxp,sc16is750" for NXP SC16IS750,
      9  - "nxp,sc16is752" for NXP SC16IS752,
     10  - "nxp,sc16is760" for NXP SC16IS760,
     11  - "nxp,sc16is762" for NXP SC16IS762.
     12- reg: I2C address of the SC16IS7xx device.
     13- interrupts: Should contain the UART interrupt
     14- clocks: Reference to the IC source clock.
     15	OR (when there is no clock provider visible to the platform)
     16- clock-frequency: The source clock frequency for the IC.
     17
     18Optional properties:
     19- gpio-controller: Marks the device node as a GPIO controller.
     20- #gpio-cells: Should be two. The first cell is the GPIO number and
     21  the second cell is used to specify the GPIO polarity:
     22    0 = active high,
     23    1 = active low.
     24- irda-mode-ports: An array that lists the indices of the port that
     25		   should operate in IrDA mode.
     26
     27Example:
     28        sc16is750: sc16is750@51 {
     29                compatible = "nxp,sc16is750";
     30                reg = <0x51>;
     31                clocks = <&clk20m>;
     32                interrupt-parent = <&gpio3>;
     33                interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
     34                gpio-controller;
     35                #gpio-cells = <2>;
     36        };
     37
     38* spi as bus
     39
     40Required properties:
     41- compatible: Should be one of the following:
     42  - "nxp,sc16is740" for NXP SC16IS740,
     43  - "nxp,sc16is741" for NXP SC16IS741,
     44  - "nxp,sc16is750" for NXP SC16IS750,
     45  - "nxp,sc16is752" for NXP SC16IS752,
     46  - "nxp,sc16is760" for NXP SC16IS760,
     47  - "nxp,sc16is762" for NXP SC16IS762.
     48- reg: SPI chip select number.
     49- interrupts: Specifies the interrupt source of the parent interrupt
     50  controller. The format of the interrupt specifier depends on the
     51  parent interrupt controller.
     52- clocks: phandle to the IC source clock.
     53
     54Optional properties:
     55- gpio-controller: Marks the device node as a GPIO controller.
     56- #gpio-cells: Should be two. The first cell is the GPIO number and
     57  the second cell is used to specify the GPIO polarity:
     58    0 = active high,
     59    1 = active low.
     60- irda-mode-ports: An array that lists the indices of the port that
     61		   should operate in IrDA mode.
     62
     63Example:
     64	sc16is750: sc16is750@0 {
     65		compatible = "nxp,sc16is750";
     66		reg = <0>;
     67		clocks = <&clk20m>;
     68		interrupt-parent = <&gpio3>;
     69		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
     70		gpio-controller;
     71		#gpio-cells = <2>;
     72	};