cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,msm-uart.txt (717B)

      1* MSM Serial UART
      2
      3The MSM serial UART hardware is designed for low-speed use cases where a
      4dma-engine isn't needed. From a software perspective it's mostly compatible
      5with the MSM serial UARTDM except that it only supports reading and writing one
      6character at a time.
      7
      8Required properties:
      9- compatible: Should contain "qcom,msm-uart"
     10- reg: Should contain UART register location and length.
     11- interrupts: Should contain UART interrupt.
     12- clocks: Should contain the core clock.
     13- clock-names: Should be "core".
     14
     15Example:
     16
     17A uart device at 0xa9c00000 with interrupt 11.
     18
     19serial@a9c00000 {
     20	compatible = "qcom,msm-uart";
     21	reg = <0xa9c00000 0x1000>;
     22	interrupts = <11>;
     23	clocks = <&uart_cxc>;
     24	clock-names = "core";
     25};