cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

renesas,scif.yaml (5796B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Renesas Serial Communication Interface with FIFO (SCIF)
      8
      9maintainers:
     10  - Geert Uytterhoeven <geert+renesas@glider.be>
     11
     12allOf:
     13  - $ref: serial.yaml#
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - items:
     19          - enum:
     20              - renesas,scif-r7s72100     # RZ/A1H
     21          - const: renesas,scif           # generic SCIF compatible UART
     22
     23      - items:
     24          - enum:
     25              - renesas,scif-r7s9210      # RZ/A2
     26
     27      - items:
     28          - enum:
     29              - renesas,scif-r8a7778      # R-Car M1
     30              - renesas,scif-r8a7779      # R-Car H1
     31          - const: renesas,rcar-gen1-scif # R-Car Gen1
     32          - const: renesas,scif           # generic SCIF compatible UART
     33
     34      - items:
     35          - enum:
     36              - renesas,scif-r8a7742      # RZ/G1H
     37              - renesas,scif-r8a7743      # RZ/G1M
     38              - renesas,scif-r8a7744      # RZ/G1N
     39              - renesas,scif-r8a7745      # RZ/G1E
     40              - renesas,scif-r8a77470     # RZ/G1C
     41              - renesas,scif-r8a7790      # R-Car H2
     42              - renesas,scif-r8a7791      # R-Car M2-W
     43              - renesas,scif-r8a7792      # R-Car V2H
     44              - renesas,scif-r8a7793      # R-Car M2-N
     45              - renesas,scif-r8a7794      # R-Car E2
     46          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
     47          - const: renesas,scif           # generic SCIF compatible UART
     48
     49      - items:
     50          - enum:
     51              - renesas,scif-r8a774a1     # RZ/G2M
     52              - renesas,scif-r8a774b1     # RZ/G2N
     53              - renesas,scif-r8a774c0     # RZ/G2E
     54              - renesas,scif-r8a774e1     # RZ/G2H
     55              - renesas,scif-r8a7795      # R-Car H3
     56              - renesas,scif-r8a7796      # R-Car M3-W
     57              - renesas,scif-r8a77961     # R-Car M3-W+
     58              - renesas,scif-r8a77965     # R-Car M3-N
     59              - renesas,scif-r8a77970     # R-Car V3M
     60              - renesas,scif-r8a77980     # R-Car V3H
     61              - renesas,scif-r8a77990     # R-Car E3
     62              - renesas,scif-r8a77995     # R-Car D3
     63          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
     64          - const: renesas,scif           # generic SCIF compatible UART
     65
     66      - items:
     67          - enum:
     68              - renesas,scif-r8a779a0     # R-Car V3U
     69              - renesas,scif-r8a779f0     # R-Car S4-8
     70          - const: renesas,rcar-gen4-scif # R-Car Gen4
     71          - const: renesas,scif           # generic SCIF compatible UART
     72
     73      - items:
     74          - enum:
     75              - renesas,scif-r9a07g044      # RZ/G2{L,LC}
     76
     77      - items:
     78          - enum:
     79              - renesas,scif-r9a07g043      # RZ/G2UL
     80              - renesas,scif-r9a07g054      # RZ/V2L
     81          - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback
     82
     83  reg:
     84    maxItems: 1
     85
     86  interrupts:
     87    oneOf:
     88      - items:
     89          - description: A combined interrupt
     90      - items:
     91          - description: Error interrupt
     92          - description: Receive buffer full interrupt
     93          - description: Transmit buffer empty interrupt
     94          - description: Transmit End interrupt
     95      - items:
     96          - description: Error interrupt
     97          - description: Receive buffer full interrupt
     98          - description: Transmit buffer empty interrupt
     99          - description: Break interrupt
    100          - description: Data Ready interrupt
    101          - description: Transmit End interrupt
    102
    103  interrupt-names:
    104    oneOf:
    105      - items:
    106          - const: eri
    107          - const: rxi
    108          - const: txi
    109          - const: tei
    110      - items:
    111          - const: eri
    112          - const: rxi
    113          - const: txi
    114          - const: bri
    115          - const: dri
    116          - const: tei
    117
    118  clocks:
    119    minItems: 1
    120    maxItems: 4
    121
    122  clock-names:
    123    minItems: 1
    124    maxItems: 4
    125    items:
    126      enum:
    127        - fck # UART functional clock
    128        - sck # optional external clock input
    129        - brg_int # optional internal clock source for BRG frequency divider
    130        - scif_clk # optional external clock source for BRG frequency divider
    131
    132  power-domains:
    133    maxItems: 1
    134
    135  resets:
    136    maxItems: 1
    137
    138  dmas:
    139    minItems: 2
    140    maxItems: 4
    141    description:
    142      Must contain a list of pairs of references to DMA specifiers, one for
    143      transmission, and one for reception.
    144
    145  dma-names:
    146    minItems: 2
    147    maxItems: 4
    148    items:
    149      enum:
    150        - tx
    151        - rx
    152
    153required:
    154  - compatible
    155  - reg
    156  - interrupts
    157  - clocks
    158  - clock-names
    159  - power-domains
    160
    161if:
    162  properties:
    163    compatible:
    164      contains:
    165        enum:
    166          - renesas,rcar-gen2-scif
    167          - renesas,rcar-gen3-scif
    168          - renesas,rcar-gen4-scif
    169          - renesas,scif-r9a07g044
    170then:
    171  required:
    172    - resets
    173
    174unevaluatedProperties: false
    175
    176examples:
    177  - |
    178    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
    179    #include <dt-bindings/interrupt-controller/arm-gic.h>
    180    #include <dt-bindings/power/r8a7791-sysc.h>
    181    aliases {
    182            serial0 = &scif0;
    183    };
    184
    185    scif0: serial@e6e60000 {
    186            compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
    187                         "renesas,scif";
    188            reg = <0xe6e60000 64>;
    189            interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
    190            clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
    191                     <&scif_clk>;
    192            clock-names = "fck", "brg_int", "scif_clk";
    193            dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
    194            dma-names = "tx", "rx", "tx", "rx";
    195            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
    196            resets = <&cpg 721>;
    197    };