cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sprd-uart.yaml (1561B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright 2019 Unisoc Inc.
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/serial/sprd-uart.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Spreadtrum serial UART
      9
     10maintainers:
     11  - Orson Zhai <orsonzhai@gmail.com>
     12  - Baolin Wang <baolin.wang7@gmail.com>
     13  - Chunyan Zhang <zhang.lyra@gmail.com>
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - items:
     19          - enum:
     20              - sprd,sc9860-uart
     21              - sprd,sc9863a-uart
     22              - sprd,ums512-uart
     23          - const: sprd,sc9836-uart
     24      - const: sprd,sc9836-uart
     25
     26  reg:
     27    maxItems: 1
     28
     29  interrupts:
     30    maxItems: 1
     31
     32  clocks:
     33    minItems: 1
     34    maxItems: 3
     35
     36  clock-names:
     37    description: |
     38      "enable" for UART module enable clock, "uart" for UART clock, "source"
     39      for UART source (parent) clock.
     40    items:
     41      - const: enable
     42      - const: uart
     43      - const: source
     44
     45  dmas:
     46    minItems: 1
     47    maxItems: 2
     48
     49  dma-names:
     50    minItems: 1
     51    items:
     52      - const: rx
     53      - const: tx
     54
     55required:
     56  - compatible
     57  - reg
     58  - interrupts
     59
     60additionalProperties: false
     61
     62examples:
     63  - |
     64    #include <dt-bindings/interrupt-controller/arm-gic.h>
     65    serial@0 {
     66      compatible = "sprd,sc9860-uart", "sprd,sc9836-uart";
     67      reg = <0x0 0x100>;
     68      interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
     69      dma-names = "rx", "tx";
     70      dmas = <&ap_dma 19>, <&ap_dma 20>;
     71      clock-names = "enable", "uart", "source";
     72      clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>;
     73    };
     74
     75...