cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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st,stm32-uart.yaml (2719B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7maintainers:
      8  - Erwan Le Ray <erwan.leray@foss.st.com>
      9
     10title: STMicroelectronics STM32 USART bindings
     11
     12properties:
     13  compatible:
     14    enum:
     15      - st,stm32-uart
     16      - st,stm32f7-uart
     17      - st,stm32h7-uart
     18
     19  reg:
     20    maxItems: 1
     21
     22  interrupts:
     23    maxItems: 1
     24
     25  clocks:
     26    maxItems: 1
     27
     28  resets:
     29    maxItems: 1
     30
     31  label:
     32    description: label associated with this uart
     33
     34  st,hw-flow-ctrl:
     35    description: enable hardware flow control (deprecated)
     36    $ref: /schemas/types.yaml#/definitions/flag
     37
     38  uart-has-rtscts: true
     39
     40  rx-tx-swap: true
     41
     42  dmas:
     43    minItems: 1
     44    maxItems: 2
     45
     46  dma-names:
     47    items:
     48      enum: [ rx, tx ]
     49    minItems: 1
     50    maxItems: 2
     51
     52# cts-gpios and rts-gpios properties can be used instead of 'uart-has-rtscts'
     53# or 'st,hw-flow-ctrl' (deprecated) for making use of any gpio pins for flow
     54# control instead of dedicated pins.
     55#
     56# It should be noted that both cts-gpios/rts-gpios and 'uart-has-rtscts' or
     57# 'st,hw-flow-ctrl' (deprecated) properties cannot co-exist in a design.
     58  cts-gpios: true
     59  rts-gpios: true
     60
     61  wakeup-source: true
     62
     63  rs485-rts-delay: true
     64  rs485-rts-active-low: true
     65  linux,rs485-enabled-at-boot-time: true
     66  rs485-rx-during-tx: true
     67
     68  rx-threshold:
     69    description:
     70      If value is set to 1, RX FIFO threshold is disabled.
     71    enum: [1, 2, 4, 8, 12, 14, 16]
     72    default: 8
     73
     74  tx-threshold:
     75    description:
     76      If value is set to 1, TX FIFO threshold is disabled.
     77    enum: [1, 2, 4, 8, 12, 14, 16]
     78    default: 8
     79
     80allOf:
     81  - $ref: rs485.yaml#
     82  - $ref: serial.yaml#
     83  - if:
     84      required:
     85        - st,hw-flow-ctrl
     86    then:
     87      properties:
     88        cts-gpios: false
     89        rts-gpios: false
     90  - if:
     91      properties:
     92        compatible:
     93          const: st,stm32-uart
     94    then:
     95      properties:
     96        rx-tx-swap: false
     97  - if:
     98      properties:
     99        compatible:
    100          contains:
    101            enum:
    102              - st,stm32-uart
    103              - st,stm32f7-uart
    104    then:
    105      properties:
    106        rx-threshold: false
    107        tx-threshold: false
    108
    109required:
    110  - compatible
    111  - reg
    112  - interrupts
    113  - clocks
    114
    115unevaluatedProperties: false
    116
    117examples:
    118  - |
    119    #include <dt-bindings/clock/stm32mp1-clks.h>
    120    usart1: serial@40011000 {
    121      compatible = "st,stm32h7-uart";
    122      reg = <0x40011000 0x400>;
    123      interrupts = <37>;
    124      clocks = <&rcc 0 164>;
    125      dmas = <&dma2 2 4 0x414 0x0>,
    126             <&dma2 7 4 0x414 0x0>;
    127      dma-names = "rx", "tx";
    128      rx-threshold = <4>;
    129      tx-threshold = <4>;
    130      rs485-rts-active-low;
    131    };
    132
    133...