cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ucc.txt (3163B)


      1* UCC (Unified Communications Controllers)
      2
      3Required properties:
      4- device_type : should be "network", "hldc", "uart", "transparent"
      5  "bisync", "atm", or "serial".
      6- compatible : could be "ucc_geth" or "fsl_atm" and so on.
      7- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
      8- reg : Offset and length of the register set for the device
      9- interrupts : <a b> where a is the interrupt number and b is a
     10  field that represents an encoding of the sense and level
     11  information for the interrupt.  This should be encoded based on
     12  the information in section 2) depending on the type of interrupt
     13  controller you have.
     14- pio-handle : The phandle for the Parallel I/O port configuration.
     15- port-number : for UART drivers, the port number to use, between 0 and 3.
     16  This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
     17  The port number is added to the minor number of the device.  Unlike the
     18  CPM UART driver, the port-number is required for the QE UART driver.
     19- soft-uart : for UART drivers, if specified this means the QE UART device
     20  driver should use "Soft-UART" mode, which is needed on some SOCs that have
     21  broken UART hardware.  Soft-UART is provided via a microcode upload.
     22- rx-clock-name: the UCC receive clock source
     23  "none": clock source is disabled
     24  "brg1" through "brg16": clock source is BRG1-BRG16, respectively
     25  "clk1" through "clk24": clock source is CLK1-CLK24, respectively
     26- tx-clock-name: the UCC transmit clock source
     27  "none": clock source is disabled
     28  "brg1" through "brg16": clock source is BRG1-BRG16, respectively
     29  "clk1" through "clk24": clock source is CLK1-CLK24, respectively
     30The following two properties are deprecated.  rx-clock has been replaced
     31with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
     32Drivers that currently use the deprecated properties should continue to
     33do so, in order to support older device trees, but they should be updated
     34to check for the new properties first.
     35- rx-clock : represents the UCC receive clock source.
     36  0x00 : clock source is disabled;
     37  0x1~0x10 : clock source is BRG1~BRG16 respectively;
     38  0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
     39- tx-clock: represents the UCC transmit clock source;
     40  0x00 : clock source is disabled;
     41  0x1~0x10 : clock source is BRG1~BRG16 respectively;
     42  0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
     43
     44Required properties for network device_type:
     45- mac-address : list of bytes representing the ethernet address.
     46- phy-handle : The phandle for the PHY connected to this controller.
     47
     48Recommended properties:
     49- phy-connection-type : a string naming the controller/PHY interface type,
     50  i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
     51  Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
     52  "tbi", or "rtbi".
     53
     54Example:
     55	ucc@2000 {
     56		device_type = "network";
     57		compatible = "ucc_geth";
     58		cell-index = <1>;
     59		reg = <2000 200>;
     60		interrupts = <a0 0>;
     61		interrupt-parent = <700>;
     62		mac-address = [ 00 04 9f 00 23 23 ];
     63		rx-clock = "none";
     64		tx-clock = "clk9";
     65		phy-handle = <212000>;
     66		phy-connection-type = "gmii";
     67		pio-handle = <140001>;
     68	};