cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,imx8mm-disp-blk-ctrl.yaml (2503B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NXP i.MX8MM DISP blk-ctrl
      8
      9maintainers:
     10  - Lucas Stach <l.stach@pengutronix.de>
     11
     12description:
     13  The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
     14  the NoC and ensuring proper power sequencing of the display and MIPI CSI
     15  peripherals located in the DISP domain of the SoC.
     16
     17properties:
     18  compatible:
     19    items:
     20      - const: fsl,imx8mm-disp-blk-ctrl
     21      - const: syscon
     22
     23  reg:
     24    maxItems: 1
     25
     26  '#power-domain-cells':
     27    const: 1
     28
     29  power-domains:
     30    minItems: 5
     31    maxItems: 5
     32
     33  power-domain-names:
     34    items:
     35      - const: bus
     36      - const: csi-bridge
     37      - const: lcdif
     38      - const: mipi-dsi
     39      - const: mipi-csi
     40
     41  clocks:
     42    minItems: 10
     43    maxItems: 10
     44
     45  clock-names:
     46    items:
     47      - const: csi-bridge-axi
     48      - const: csi-bridge-apb
     49      - const: csi-bridge-core
     50      - const: lcdif-axi
     51      - const: lcdif-apb
     52      - const: lcdif-pix
     53      - const: dsi-pclk
     54      - const: dsi-ref
     55      - const: csi-aclk
     56      - const: csi-pclk
     57
     58required:
     59  - compatible
     60  - reg
     61  - power-domains
     62  - power-domain-names
     63  - clocks
     64  - clock-names
     65
     66additionalProperties: false
     67
     68examples:
     69  - |
     70    #include <dt-bindings/clock/imx8mm-clock.h>
     71    #include <dt-bindings/power/imx8mm-power.h>
     72
     73    disp_blk_ctl: blk_ctrl@32e28000 {
     74      compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";
     75      reg = <0x32e28000 0x100>;
     76      power-domains = <&pgc_dispmix>, <&pgc_dispmix>, <&pgc_dispmix>,
     77                      <&pgc_mipi>, <&pgc_mipi>;
     78      power-domain-names = "bus", "csi-bridge", "lcdif",
     79                           "mipi-dsi", "mipi-csi";
     80      clocks = <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
     81               <&clk IMX8MM_CLK_DISP_APB_ROOT>,
     82               <&clk IMX8MM_CLK_CSI1_ROOT>,
     83               <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
     84               <&clk IMX8MM_CLK_DISP_APB_ROOT>,
     85               <&clk IMX8MM_CLK_DISP_ROOT>,
     86               <&clk IMX8MM_CLK_DSI_CORE>,
     87               <&clk IMX8MM_CLK_DSI_PHY_REF>,
     88               <&clk IMX8MM_CLK_CSI1_CORE>,
     89               <&clk IMX8MM_CLK_CSI1_PHY_REF>;
     90       clock-names = "csi-bridge-axi", "csi-bridge-apb", "csi-bridge-core",
     91                     "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
     92                     "dsi-ref", "csi-aclk", "csi-pclk";
     93       #power-domain-cells = <1>;
     94    };