cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,imx8mp-hdmi-blk-ctrl.yaml (2061B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NXP i.MX8MP HDMI blk-ctrl
      8
      9maintainers:
     10  - Lucas Stach <l.stach@pengutronix.de>
     11
     12description:
     13  The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
     14  the NoC and ensuring proper power sequencing of the display pipeline
     15  peripherals located in the HDMI domain of the SoC.
     16
     17properties:
     18  compatible:
     19    items:
     20      - const: fsl,imx8mp-hdmi-blk-ctrl
     21      - const: syscon
     22
     23  reg:
     24    maxItems: 1
     25
     26  '#power-domain-cells':
     27    const: 1
     28
     29  power-domains:
     30    minItems: 8
     31    maxItems: 8
     32
     33  power-domain-names:
     34    items:
     35      - const: bus
     36      - const: irqsteer
     37      - const: lcdif
     38      - const: pai
     39      - const: pvi
     40      - const: trng
     41      - const: hdmi-tx
     42      - const: hdmi-tx-phy
     43
     44  clocks:
     45    minItems: 4
     46    maxItems: 4
     47
     48  clock-names:
     49    items:
     50      - const: apb
     51      - const: axi
     52      - const: ref_266m
     53      - const: ref_24m
     54
     55required:
     56  - compatible
     57  - reg
     58  - power-domains
     59  - power-domain-names
     60  - clocks
     61  - clock-names
     62
     63additionalProperties: false
     64
     65examples:
     66  - |
     67    #include <dt-bindings/clock/imx8mp-clock.h>
     68    #include <dt-bindings/power/imx8mp-power.h>
     69
     70    blk-ctrl@32fc0000 {
     71        compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
     72        reg = <0x32fc0000 0x23c>;
     73        clocks = <&clk IMX8MP_CLK_HDMI_APB>,
     74                 <&clk IMX8MP_CLK_HDMI_ROOT>,
     75                 <&clk IMX8MP_CLK_HDMI_REF_266M>,
     76                 <&clk IMX8MP_CLK_HDMI_24M>;
     77        clock-names = "apb", "axi", "ref_266m", "ref_24m";
     78        power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
     79                        <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
     80                        <&pgc_hdmimix>, <&pgc_hdmi_phy>;
     81        power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",
     82                             "hdmi-tx", "hdmi-tx-phy";
     83        #power-domain-cells = <1>;
     84    };