cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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scpsys.txt (3052B)

      1MediaTek SCPSYS
      2===============
      3
      4The System Control Processor System (SCPSYS) has several power management
      5related tasks in the system. The tasks include thermal measurement, dynamic
      6voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control.
      7The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
      8domain control.
      9
     10The driver implements the Generic PM domain bindings described in
     11power/power-domain.yaml. It provides the power domains defined in
     12- include/dt-bindings/power/mt8173-power.h
     13- include/dt-bindings/power/mt6797-power.h
     14- include/dt-bindings/power/mt6765-power.h
     15- include/dt-bindings/power/mt2701-power.h
     16- include/dt-bindings/power/mt2712-power.h
     17- include/dt-bindings/power/mt7622-power.h
     18
     19Required properties:
     20- compatible: Should be one of:
     21	- "mediatek,mt2701-scpsys"
     22	- "mediatek,mt2712-scpsys"
     23	- "mediatek,mt6765-scpsys"
     24	- "mediatek,mt6797-scpsys"
     25	- "mediatek,mt7622-scpsys"
     26	- "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
     27	- "mediatek,mt7623a-scpsys": For MT7623A SoC
     28	- "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC
     29	- "mediatek,mt8173-scpsys"
     30- #power-domain-cells: Must be 1
     31- reg: Address range of the SCPSYS unit
     32- infracfg: must contain a phandle to the infracfg controller
     33- clock, clock-names: clocks according to the common clock binding.
     34                      These are clocks which hardware needs to be
     35                      enabled before enabling certain power domains.
     36	Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
     37	Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
     38	Required clocks for MT6765: MUX: "mm", "mfg"
     39				    CG: "mm-0", "mm-1", "mm-2", "mm-3", "isp-0",
     40					"isp-1", "cam-0", "cam-1", "cam-2",
     41					"cam-3","cam-4"
     42	Required clocks for MT6797: "mm", "mfg", "vdec"
     43	Required clocks for MT7622 or MT7629: "hif_sel"
     44	Required clocks for MT7623A: "ethif"
     45	Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
     46
     47Optional properties:
     48- vdec-supply: Power supply for the vdec power domain
     49- venc-supply: Power supply for the venc power domain
     50- isp-supply: Power supply for the isp power domain
     51- mm-supply: Power supply for the mm power domain
     52- venc_lt-supply: Power supply for the venc_lt power domain
     53- audio-supply: Power supply for the audio power domain
     54- usb-supply: Power supply for the usb power domain
     55- mfg_async-supply: Power supply for the mfg_async power domain
     56- mfg_2d-supply: Power supply for the mfg_2d power domain
     57- mfg-supply: Power supply for the mfg power domain
     58
     59Example:
     60
     61	scpsys: scpsys@10006000 {
     62		#power-domain-cells = <1>;
     63		compatible = "mediatek,mt8173-scpsys";
     64		reg = <0 0x10006000 0 0x1000>;
     65		infracfg = <&infracfg>;
     66		clocks = <&clk26m>,
     67			 <&topckgen CLK_TOP_MM_SEL>;
     68			 <&topckgen CLK_TOP_VENC_SEL>,
     69			 <&topckgen CLK_TOP_VENC_LT_SEL>;
     70		clock-names = "mfg", "mm", "venc", "venc_lt";
     71	};
     72
     73Example consumer:
     74
     75	afe: mt8173-afe-pcm@11220000 {
     76		compatible = "mediatek,mt8173-afe-pcm";
     77		power-domains = <&scpsys MT8173_POWER_DOMAIN_AUDIO>;
     78	};