cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cs42l52.txt (1434B)


      1CS42L52 audio CODEC
      2
      3Required properties:
      4
      5  - compatible : "cirrus,cs42l52"
      6
      7  - reg : the I2C address of the device for I2C
      8
      9Optional properties:
     10
     11  - cirrus,reset-gpio : GPIO controller's phandle and the number
     12  of the GPIO used to reset the codec.
     13
     14  - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
     15  Allowable values of 0x00 through 0x0F. These are raw values written to the
     16  register, not the actual frequency. The frequency is determined by the following.
     17  Frequency = (64xFs)/(N+2)
     18  N = chgfreq_val
     19  Fs = Sample Rate (variable)
     20
     21  - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
     22  as a differential input. If not present then the MICA input is configured as
     23  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
     24
     25  - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
     26  as a differential input. If not present then the MICB input is configured as
     27  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
     28
     29  - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
     30  0 = 0.5 x VA
     31  1 = 0.6 x VA
     32  2 = 0.7 x VA
     33  3 = 0.8 x VA
     34  4 = 0.83 x VA
     35  5 = 0.91 x VA
     36
     37Example:
     38
     39codec: codec@4a {
     40	compatible = "cirrus,cs42l52";
     41	reg = <0x4a>;
     42	reset-gpio = <&gpio 10 0>;
     43	cirrus,chgfreq-divisor = <0x05>;
     44	cirrus.mica-differential-cfg;
     45	cirrus,micbias-lvl = <5>;
     46};