cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

hisilicon,hi6210-i2s.txt (1441B)


      1* Hisilicon 6210 i2s controller
      2
      3Required properties:
      4
      5- compatible: should be one of the following:
      6   - "hisilicon,hi6210-i2s"
      7- reg: physical base address of the i2s controller unit and length of
      8   memory mapped region.
      9- interrupts: should contain the i2s interrupt.
     10- clocks: a list of phandle + clock-specifier pairs, one for each entry
     11  in clock-names.
     12- clock-names: should contain following:
     13   - "dacodec"
     14   - "i2s-base"
     15- dmas: DMA specifiers for tx dma. See the DMA client binding,
     16  Documentation/devicetree/bindings/dma/dma.txt
     17- dma-names: should be "tx" and "rx"
     18- hisilicon,sysctrl-syscon: phandle to sysctrl syscon
     19- #sound-dai-cells: Should be set to 1 (for multi-dai)
     20   - The dai cell indexes reference the following interfaces:
     21       0: S2 interface
     22       (Currently that is the only one available, but more may be
     23        supported in the future)
     24
     25Example for the hi6210 i2s controller:
     26
     27i2s0: i2s@f7118000{
     28	compatible = "hisilicon,hi6210-i2s";
     29	reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */
     30	interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* 155 "DigACodec_intr"-32 */
     31	clocks = <&sys_ctrl HI6220_DACODEC_PCLK>,
     32		 <&sys_ctrl HI6220_BBPPLL0_DIV>;
     33	clock-names = "dacodec", "i2s-base";
     34	dmas = <&dma0 15 &dma0 14>;
     35	dma-names = "rx", "tx";
     36	hisilicon,sysctrl-syscon = <&sys_ctrl>;
     37	#sound-dai-cells = <1>;
     38};
     39
     40Then when referencing the i2s controller:
     41	sound-dai = <&i2s0 0>; /* index 0 => S2 interface */
     42