cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel,keembay-i2s.yaml (1892B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2# Copyright 2020 Intel Corporation
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Intel KeemBay I2S Device Tree Bindings
      9
     10maintainers:
     11  - Sia, Jee Heng <jee.heng.sia@intel.com>
     12
     13description: |
     14 Intel KeemBay I2S
     15
     16properties:
     17  compatible:
     18    enum:
     19      - intel,keembay-i2s
     20      - intel,keembay-tdm
     21      - intel,keembay-hdmi-i2s
     22
     23  "#sound-dai-cells":
     24    const: 0
     25
     26  reg:
     27    items:
     28      - description: I2S registers
     29      - description: I2S gen configuration
     30
     31  reg-names:
     32    items:
     33      - const: i2s-regs
     34      - const: i2s_gen_cfg
     35
     36  interrupts:
     37    maxItems: 1
     38
     39  clocks:
     40    items:
     41      - description: Bus Clock
     42      - description: Module Clock
     43
     44  clock-names:
     45    items:
     46      - const: osc
     47      - const: apb_clk
     48
     49  dmas:
     50    items:
     51      - description: DMA TX channel
     52      - description: DMA RX channel
     53
     54  dma-names:
     55    items:
     56      - const: tx
     57      - const: rx
     58
     59required:
     60  - compatible
     61  - "#sound-dai-cells"
     62  - reg
     63  - clocks
     64  - clock-names
     65  - interrupts
     66
     67additionalProperties: false
     68
     69examples:
     70  - |
     71     #include <dt-bindings/interrupt-controller/arm-gic.h>
     72     #include <dt-bindings/interrupt-controller/irq.h>
     73     #define KEEM_BAY_PSS_AUX_I2S3
     74     #define KEEM_BAY_PSS_I2S3
     75     i2s3: i2s@20140000 {
     76         compatible = "intel,keembay-i2s";
     77         #sound-dai-cells = <0>;
     78         reg = <0x20140000 0x200>, /* I2S registers */
     79               <0x202a00a4 0x4>; /* I2S gen configuration */
     80         reg-names = "i2s-regs", "i2s_gen_cfg";
     81         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
     82         clock-names = "osc", "apb_clk";
     83         clocks = <&scmi_clk KEEM_BAY_PSS_AUX_I2S3>, <&scmi_clk KEEM_BAY_PSS_I2S3>;
     84         dmas = <&axi_dma0 29>, <&axi_dma0 33>;
     85         dma-names = "tx", "rx";
     86     };