cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mchp,i2s-mcc.yaml (2777B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Microchip I2S Multi-Channel Controller
      8
      9maintainers:
     10  - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
     11
     12description:
     13  The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
     14  supports a Time Division Multiplexed (TDM) interface with external
     15  multi-channel audio codecs. It consists of a receiver, a transmitter and a
     16  common clock generator that can be enabled separately to provide Adapter,
     17  Client or Controller modes with receiver and/or transmitter active.
     18  On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
     19  multi-channel is supported by using multiple data pins, output and
     20  input, without TDM.
     21
     22properties:
     23  "#sound-dai-cells":
     24    const: 0
     25
     26  compatible:
     27    enum:
     28      - microchip,sam9x60-i2smcc
     29      - microchip,sama7g5-i2smcc
     30
     31  reg:
     32    maxItems: 1
     33
     34  interrupts:
     35    maxItems: 1
     36
     37  clocks:
     38    items:
     39      - description: Peripheral Bus Clock
     40      - description: Generic Clock (Optional). Should be set mostly when Master
     41          Mode is required.
     42    minItems: 1
     43
     44  clock-names:
     45    items:
     46      - const: pclk
     47      - const: gclk
     48    minItems: 1
     49
     50  dmas:
     51    items:
     52      - description: TX DMA Channel
     53      - description: RX DMA Channel
     54
     55  dma-names:
     56    items:
     57      - const: tx
     58      - const: rx
     59
     60  microchip,tdm-data-pair:
     61    description:
     62      Represents the DIN/DOUT pair pins that are used to receive/send
     63      TDM data. It is optional and it is only needed if the controller
     64      uses the TDM mode.
     65    $ref: /schemas/types.yaml#/definitions/uint8
     66    enum: [0, 1, 2, 3]
     67    default: 0
     68
     69if:
     70  properties:
     71    compatible:
     72      const: microchip,sam9x60-i2smcc
     73then:
     74  properties:
     75    microchip,tdm-data-pair: false
     76
     77required:
     78  - "#sound-dai-cells"
     79  - compatible
     80  - reg
     81  - interrupts
     82  - clocks
     83  - clock-names
     84  - dmas
     85  - dma-names
     86
     87additionalProperties: false
     88
     89examples:
     90  - |
     91    #include <dt-bindings/dma/at91.h>
     92    #include <dt-bindings/interrupt-controller/arm-gic.h>
     93
     94    i2s@f001c000 {
     95        #sound-dai-cells = <0>;
     96        compatible = "microchip,sam9x60-i2smcc";
     97        reg = <0xf001c000 0x100>;
     98        interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
     99        dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
    100                       AT91_XDMAC_DT_PERID(36))>,
    101               <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
    102                       AT91_XDMAC_DT_PERID(37))>;
    103        dma-names = "tx", "rx";
    104        clocks = <&i2s_clk>, <&i2s_gclk>;
    105        clock-names = "pclk", "gclk";
    106        pinctrl-names = "default";
    107        pinctrl-0 = <&pinctrl_i2s_default>;
    108    };