cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nvidia,tegra20-ac97.txt (1237B)

      1NVIDIA Tegra 20 AC97 controller
      2
      3Required properties:
      4- compatible : "nvidia,tegra20-ac97"
      5- reg : Should contain AC97 controller registers location and length
      6- interrupts : Should contain AC97 interrupt
      7- resets : Must contain an entry for each entry in reset-names.
      8  See ../reset/reset.txt for details.
      9- reset-names : Must include the following entries:
     10  - ac97
     11- dmas : Must contain an entry for each entry in clock-names.
     12  See ../dma/dma.txt for details.
     13- dma-names : Must include the following entries:
     14  - rx
     15  - tx
     16- clocks : Must contain one entry, for the module clock.
     17  See ../clocks/clock-bindings.txt for details.
     18- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
     19  of the GPIO used to reset the external AC97 codec
     20- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
     21  of the GPIO corresponding with the AC97 DAP _FS line
     22
     23Example:
     24
     25ac97@70002000 {
     26	compatible = "nvidia,tegra20-ac97";
     27	reg = <0x70002000 0x200>;
     28	interrupts = <0 81 0x04>;
     29	nvidia,codec-reset-gpio = <&gpio 170 0>;
     30	nvidia,codec-sync-gpio = <&gpio 120 0>;
     31	clocks = <&tegra_car 3>;
     32	resets = <&tegra_car 3>;
     33	reset-names = "ac97";
     34	dmas = <&apbdma 12>, <&apbdma 12>;
     35	dma-names = "rx", "tx";
     36};