cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nvidia,tegra210-i2s.yaml (2941B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Tegra210 I2S Controller Device Tree Bindings
      8
      9description: |
     10  The Inter-IC Sound (I2S) controller implements full-duplex,
     11  bi-directional and single direction point-to-point serial
     12  interfaces. It can interface with I2S compatible devices.
     13  I2S controller can operate both in master and slave mode.
     14
     15maintainers:
     16  - Jon Hunter <jonathanh@nvidia.com>
     17  - Sameer Pujar <spujar@nvidia.com>
     18
     19allOf:
     20  - $ref: name-prefix.yaml#
     21
     22properties:
     23  $nodename:
     24    pattern: "^i2s@[0-9a-f]*$"
     25
     26  compatible:
     27    oneOf:
     28      - const: nvidia,tegra210-i2s
     29      - items:
     30          - enum:
     31              - nvidia,tegra234-i2s
     32              - nvidia,tegra194-i2s
     33              - nvidia,tegra186-i2s
     34          - const: nvidia,tegra210-i2s
     35
     36  reg:
     37    maxItems: 1
     38
     39  clocks:
     40    minItems: 1
     41    items:
     42      - description: I2S bit clock
     43      - description:
     44          Sync input clock, which can act as clock source to other I/O
     45          modules in AHUB. The Tegra I2S driver sets this clock rate as
     46          per bit clock rate. I/O module which wants to use this clock
     47          as source, can mention this clock as parent in the DT bindings.
     48          This is an optional clock entry, since it is only required when
     49          some other I/O wants to reference from a particular I2Sx
     50          instance.
     51
     52  clock-names:
     53    minItems: 1
     54    items:
     55      - const: i2s
     56      - const: sync_input
     57
     58  assigned-clocks:
     59    minItems: 1
     60    maxItems: 2
     61
     62  assigned-clock-parents:
     63    minItems: 1
     64    maxItems: 2
     65
     66  assigned-clock-rates:
     67    minItems: 1
     68    maxItems: 2
     69
     70  sound-name-prefix:
     71    pattern: "^I2S[1-9]$"
     72
     73  ports:
     74    $ref: /schemas/graph.yaml#/properties/ports
     75    properties:
     76      port@0:
     77        $ref: audio-graph-port.yaml#
     78        unevaluatedProperties: false
     79        description: |
     80          I2S ACIF (Audio Client Interface) port connected to the
     81          corresponding AHUB (Audio Hub) ACIF port.
     82
     83      port@1:
     84        $ref: audio-graph-port.yaml#
     85        unevaluatedProperties: false
     86        description: |
     87          I2S DAP (Digital Audio Port) interface which can be connected
     88          to external audio codec for playback or capture.
     89
     90required:
     91  - compatible
     92  - reg
     93  - clocks
     94  - clock-names
     95  - assigned-clocks
     96  - assigned-clock-parents
     97
     98additionalProperties: false
     99
    100examples:
    101  - |
    102    #include<dt-bindings/clock/tegra210-car.h>
    103
    104    i2s@702d1000 {
    105        compatible = "nvidia,tegra210-i2s";
    106        reg = <0x702d1000 0x100>;
    107        clocks = <&tegra_car TEGRA210_CLK_I2S0>;
    108        clock-names = "i2s";
    109        assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
    110        assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
    111        assigned-clock-rates = <1536000>;
    112        sound-name-prefix = "I2S1";
    113    };
    114
    115...