cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,q6dsp-lpass-clocks.yaml (1878B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-clocks.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Qualcomm DSP LPASS Clock Controller binding
      8
      9maintainers:
     10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
     11
     12description: |
     13  This binding describes the Qualcomm DSP Clock Controller
     14
     15properties:
     16  compatible:
     17    enum:
     18      - qcom,q6afe-clocks
     19      - qcom,q6prm-lpass-clocks
     20
     21  reg:
     22    maxItems: 1
     23
     24  '#clock-cells':
     25    const: 2
     26    description:
     27      Clock Id is followed by clock coupling attributes.
     28        1 = for no coupled clock
     29        2 = for dividend of the coupled clock
     30        3 = for divisor of the coupled clock
     31        4 = for inverted and no couple clock
     32
     33required:
     34  - compatible
     35  - reg
     36  - "#clock-cells"
     37
     38additionalProperties: false
     39
     40examples:
     41  - |
     42    #include <dt-bindings/soc/qcom,apr.h>
     43    #include <dt-bindings/sound/qcom,q6afe.h>
     44    apr {
     45        #address-cells = <1>;
     46        #size-cells = <0>;
     47        apr-service@4 {
     48            reg = <APR_SVC_AFE>;
     49            #address-cells = <1>;
     50            #size-cells = <0>;
     51            clock-controller@2 {
     52              compatible = "qcom,q6afe-clocks";
     53              reg = <2>;
     54              #clock-cells = <2>;
     55            };
     56        };
     57      };
     58
     59  - |
     60    #include <dt-bindings/soc/qcom,gpr.h>
     61    gpr {
     62        compatible = "qcom,gpr";
     63        qcom,domain = <GPR_DOMAIN_ID_ADSP>;
     64        #address-cells = <1>;
     65        #size-cells = <0>;
     66        service@2 {
     67            reg = <GPR_PRM_MODULE_IID>;
     68            compatible = "qcom,q6prm";
     69            #address-cells = <1>;
     70            #size-cells = <0>;
     71            clock-controller@2 {
     72              compatible = "qcom,q6prm-lpass-clocks";
     73              reg = <2>;
     74              #clock-cells = <2>;
     75            };
     76        };
     77      };