cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

samsung-i2s.yaml (3794B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung SoC I2S controller
      8
      9maintainers:
     10  - Krzysztof Kozlowski <krzk@kernel.org>
     11  - Sylwester Nawrocki <s.nawrocki@samsung.com>
     12
     13properties:
     14  compatible:
     15    description: |
     16      samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
     17
     18      samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
     19      secondary FIFO, s/w reset control and internal mux for root clock
     20      source.
     21
     22      samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
     23      playback, stereo channel capture, secondary FIFO using internal
     24      or external DMA, s/w reset control, internal mux for root clock
     25      source and 7.1 channel TDM support for playback; TDM (Time division
     26      multiplexing) is to allow transfer of multiple channel audio data on
     27      single data line.
     28
     29      samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
     30      Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
     31      with only external DMA and more number of root clock sampling
     32      frequencies.
     33
     34      samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
     35      stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
     36      slightly modified bit offsets.
     37    enum:
     38      - samsung,s3c6410-i2s
     39      - samsung,s5pv210-i2s
     40      - samsung,exynos5420-i2s
     41      - samsung,exynos7-i2s
     42      - samsung,exynos7-i2s1
     43
     44  '#address-cells':
     45    const: 1
     46
     47  '#size-cells':
     48    const: 0
     49
     50  reg:
     51    maxItems: 1
     52
     53  dmas:
     54    minItems: 2
     55    maxItems: 3
     56
     57  dma-names:
     58    oneOf:
     59      - items:
     60          - const: tx
     61          - const: rx
     62      - items:
     63          - const: tx
     64          - const: rx
     65          - const: tx-sec
     66
     67  assigned-clock-parents: true
     68  assigned-clocks: true
     69
     70  clocks:
     71    minItems: 1
     72    maxItems: 3
     73
     74  clock-names:
     75    oneOf:
     76      - items:
     77          - const: iis
     78      - items: # for I2S0
     79          - const: iis
     80          - const: i2s_opclk0
     81          - const: i2s_opclk1
     82      - items: # for I2S1 and I2S2
     83          - const: iis
     84          - const: i2s_opclk0
     85    description: |
     86      "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
     87      of the root clock. I2S0 has internal mux to select the source
     88      of root clock and I2S1 and I2S2 doesn't have any such mux.
     89
     90  "#clock-cells":
     91    const: 1
     92
     93  clock-output-names:
     94    deprecated: true
     95    oneOf:
     96      - items: # for I2S0
     97          - const: i2s_cdclk0
     98      - items: # for I2S1
     99          - const: i2s_cdclk1
    100      - items: # for I2S2
    101          - const: i2s_cdclk2
    102    description: Names of the CDCLK I2S output clocks.
    103
    104  interrupts:
    105    maxItems: 1
    106
    107  samsung,idma-addr:
    108    $ref: /schemas/types.yaml#/definitions/uint32
    109    description: |
    110      Internal DMA register base address of the audio
    111      subsystem (used in secondary sound source).
    112
    113  power-domains:
    114    maxItems: 1
    115
    116  "#sound-dai-cells":
    117    const: 1
    118
    119required:
    120  - compatible
    121  - reg
    122  - dmas
    123  - dma-names
    124  - clocks
    125  - clock-names
    126
    127additionalProperties: false
    128
    129examples:
    130  - |
    131    #include <dt-bindings/clock/exynos-audss-clk.h>
    132
    133    i2s0: i2s@3830000 {
    134        compatible = "samsung,s5pv210-i2s";
    135        reg = <0x03830000 0x100>;
    136        dmas = <&pdma0 10>,
    137                <&pdma0 9>,
    138                <&pdma0 8>;
    139        dma-names = "tx", "rx", "tx-sec";
    140        clocks = <&clock_audss EXYNOS_I2S_BUS>,
    141                <&clock_audss EXYNOS_I2S_BUS>,
    142                <&clock_audss EXYNOS_SCLK_I2S>;
    143        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
    144        #clock-cells = <1>;
    145        samsung,idma-addr = <0x03000000>;
    146        pinctrl-names = "default";
    147        pinctrl-0 = <&i2s0_bus>;
    148        #sound-dai-cells = <1>;
    149    };