cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sgtl5000.yaml (2723B)

      1# SPDX-License-Identifier: GPL-2.0-only
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/sound/sgtl5000.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale SGTL5000 Stereo Codec
      8
      9maintainers:
     10  - Fabio Estevam <festevam@gmail.com>
     11
     12properties:
     13  compatible:
     14    const: fsl,sgtl5000
     15
     16  reg:
     17    maxItems: 1
     18
     19  "#sound-dai-cells":
     20    const: 0
     21
     22  assigned-clock-parents: true
     23  assigned-clock-rates: true
     24  assigned-clocks: true
     25
     26  clocks:
     27    items:
     28      - description: the clock provider of SYS_MCLK
     29
     30  VDDA-supply:
     31    description: the regulator provider of VDDA
     32
     33  VDDIO-supply:
     34    description: the regulator provider of VDDIO
     35
     36  VDDD-supply:
     37    description: the regulator provider of VDDD
     38
     39  micbias-resistor-k-ohms:
     40    description: The bias resistor to be used in kOhms. The resistor can take
     41      values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not
     42      mentioned or if the value is unknown, then micbias resistor is set to
     43      4k.
     44    enum: [ 0, 2, 4, 8 ]
     45
     46  micbias-voltage-m-volts:
     47    description: The bias voltage to be used in mVolts. The voltage can take
     48      values from 1.25V to 3V by 250mV steps. If this node is not mentioned
     49      or the value is unknown, then the value is set to 1.25V.
     50    enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
     51
     52  lrclk-strength:
     53    description: |
     54      The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
     55      table below:
     56
     57        VDDIO		1.8V		2.5V		3.3V
     58        0 =		Disable
     59        1 =		1.66 mA		2.87 mA		4.02  mA
     60        2 =		3.33 mA		5.74 mA		8.03  mA
     61        3 =		4.99 mA		8.61 mA		12.05 mA
     62    $ref: "/schemas/types.yaml#/definitions/uint32"
     63    enum: [ 0, 1, 2, 3 ]
     64
     65  sclk-strength:
     66    description: |
     67      The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
     68      table below:
     69
     70        VDDIO		1.8V		2.5V		3.3V
     71        0 =		Disable
     72        1 =		1.66 mA		2.87 mA		4.02  mA
     73        2 =		3.33 mA		5.74 mA		8.03  mA
     74        3 =		4.99 mA		8.61 mA		12.05 mA
     75    $ref: "/schemas/types.yaml#/definitions/uint32"
     76    enum: [ 0, 1, 2, 3 ]
     77
     78  port:
     79    $ref: audio-graph-port.yaml#
     80    unevaluatedProperties: false
     81
     82required:
     83  - compatible
     84  - reg
     85  - "#sound-dai-cells"
     86  - clocks
     87  - VDDA-supply
     88  - VDDIO-supply
     89
     90additionalProperties: false
     91
     92examples:
     93  - |
     94    i2c {
     95        #address-cells = <1>;
     96        #size-cells = <0>;
     97
     98        codec@a {
     99            compatible = "fsl,sgtl5000";
    100            reg = <0x0a>;
    101            #sound-dai-cells = <0>;
    102            clocks = <&clks 150>;
    103            micbias-resistor-k-ohms = <2>;
    104            micbias-voltage-m-volts = <2250>;
    105            VDDA-supply = <&reg_3p3v>;
    106            VDDIO-supply = <&reg_3p3v>;
    107        };
    108    };
    109...