cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tas2552.txt (1144B)

      1Texas Instruments - tas2552 Codec module
      2
      3The tas2552 serial control bus communicates through I2C protocols
      4
      5Required properties:
      6	- compatible - One of:
      7		"ti,tas2552" - TAS2552
      8	- reg -  I2C slave address: it can be 0x40 if ADDR pin is 0
      9				    or 0x41 if ADDR pin is 1.
     10	- supply-*: Required supply regulators are:
     11		"vbat"		battery voltage
     12		"iovdd"		I/O Voltage
     13		"avdd"		Analog DAC Voltage
     14
     15Optional properties:
     16	- enable-gpio - gpio pin to enable/disable the device
     17
     18tas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the
     19internal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, the PDM
     20reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK.
     21For system integration the dt-bindings/sound/tas2552.h header file provides
     22defined values to select and configure the PLL and PDM reference clocks.
     23
     24Example:
     25
     26tas2552: tas2552@41 {
     27	compatible = "ti,tas2552";
     28	reg = <0x41>;
     29	vbat-supply = <&reg_vbat>;
     30	iovdd-supply = <&reg_iovdd>;
     31	avdd-supply = <&reg_avdd>;
     32	enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
     33};
     34
     35For more product information please see the link below:
     36https://www.ti.com/product/TAS2552