cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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adi,axi-spi-engine.txt (955B)


      1Analog Devices AXI SPI Engine controller Device Tree Bindings
      2
      3Required properties:
      4- compatible		: Must be "adi,axi-spi-engine-1.00.a""
      5- reg			: Physical base address and size of the register map.
      6- interrupts		: Property with a value describing the interrupt
      7			  number.
      8- clock-names		: List of input clock names - "s_axi_aclk", "spi_clk"
      9- clocks		: Clock phandles and specifiers (See clock bindings for
     10			  details on clock-names and clocks).
     11- #address-cells	: Must be <1>
     12- #size-cells		: Must be <0>
     13
     14Optional subnodes:
     15	Subnodes are use to represent the SPI slave devices connected to the SPI
     16	master. They follow the generic SPI bindings as outlined in spi-bus.txt.
     17
     18Example:
     19
     20    spi@@44a00000 {
     21		compatible = "adi,axi-spi-engine-1.00.a";
     22		reg = <0x44a00000 0x1000>;
     23		interrupts = <0 56 4>;
     24		clocks = <&clkc 15 &clkc 15>;
     25		clock-names = "s_axi_aclk", "spi_clk";
     26
     27		#address-cells = <1>;
     28		#size-cells = <0>;
     29
     30		/* SPI devices */
     31    };