cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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atmel,quadspi.yaml (2063B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Atmel Quad Serial Peripheral Interface (QSPI)
      8
      9maintainers:
     10  - Tudor Ambarus <tudor.ambarus@microchip.com>
     11
     12allOf:
     13  - $ref: spi-controller.yaml#
     14
     15properties:
     16  compatible:
     17    enum:
     18      - atmel,sama5d2-qspi
     19      - microchip,sam9x60-qspi
     20      - microchip,sama7g5-qspi
     21      - microchip,sama7g5-ospi
     22
     23  reg:
     24    items:
     25      - description: base registers
     26      - description: mapped memory
     27
     28  reg-names:
     29    items:
     30      - const: qspi_base
     31      - const: qspi_mmap
     32
     33  clocks:
     34    minItems: 1
     35    items:
     36      - description: peripheral clock
     37      - description: system clock or generic clock, if available
     38
     39  clock-names:
     40    minItems: 1
     41    items:
     42      - const: pclk
     43      - enum: [ qspick, gclk ]
     44
     45  interrupts:
     46    maxItems: 1
     47
     48  dmas:
     49    items:
     50      - description: tx DMA channel
     51      - description: rx DMA channel
     52
     53  dma-names:
     54    items:
     55      - const: tx
     56      - const: rx
     57
     58  '#address-cells':
     59    const: 1
     60
     61  '#size-cells':
     62    const: 0
     63
     64required:
     65  - compatible
     66  - reg
     67  - reg-names
     68  - interrupts
     69  - clocks
     70  - clock-names
     71  - '#address-cells'
     72  - '#size-cells'
     73
     74unevaluatedProperties: false
     75
     76examples:
     77  - |
     78    #include <dt-bindings/interrupt-controller/irq.h>
     79    #include <dt-bindings/clock/at91.h>
     80    spi@f0020000 {
     81        compatible = "atmel,sama5d2-qspi";
     82        reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
     83        reg-names = "qspi_base", "qspi_mmap";
     84        interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
     85        clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
     86        clock-names = "pclk";
     87        #address-cells = <1>;
     88        #size-cells = <0>;
     89        pinctrl-names = "default";
     90        pinctrl-0 = <&pinctrl_spi0_default>;
     91
     92        flash@0 {
     93            compatible = "jedec,spi-nor";
     94            spi-max-frequency = <50000000>;
     95            reg = <0>;
     96            spi-rx-bus-width = <4>;
     97            spi-tx-bus-width = <4>;
     98        };
     99    };