cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cdns,qspi-nor-peripheral-props.yaml (1178B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Peripheral-specific properties for the Cadence QSPI controller.
      8
      9description:
     10  See spi-peripheral-props.yaml for more info.
     11
     12maintainers:
     13  - Pratyush Yadav <p.yadav@ti.com>
     14
     15properties:
     16  # cdns,qspi-nor.yaml
     17  cdns,read-delay:
     18    $ref: /schemas/types.yaml#/definitions/uint32
     19    description:
     20      Delay for read capture logic, in clock cycles.
     21
     22  cdns,tshsl-ns:
     23    description:
     24      Delay in nanoseconds for the length that the master mode chip select
     25      outputs are de-asserted between transactions.
     26
     27  cdns,tsd2d-ns:
     28    description:
     29      Delay in nanoseconds between one chip select being de-activated
     30      and the activation of another.
     31
     32  cdns,tchsh-ns:
     33    description:
     34      Delay in nanoseconds between last bit of current transaction and
     35      deasserting the device chip select (qspi_n_ss_out).
     36
     37  cdns,tslch-ns:
     38    description:
     39      Delay in nanoseconds between setting qspi_n_ss_out low and
     40      first bit transfer.
     41
     42additionalProperties: true