cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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efm32-spi.txt (1181B)


      1* Energy Micro EFM32 SPI
      2
      3Required properties:
      4- #address-cells: see spi-bus.txt
      5- #size-cells: see spi-bus.txt
      6- compatible: should be "energymicro,efm32-spi"
      7- reg: Offset and length of the register set for the controller
      8- interrupts: pair specifying rx and tx irq
      9- clocks: phandle to the spi clock
     10- cs-gpios: see spi-bus.txt
     11
     12Recommended properties :
     13- energymicro,location: Value to write to the ROUTE register's LOCATION
     14                        bitfield to configure the pinmux for the device, see
     15                        datasheet for values.
     16                        If this property is not provided, keeping what is
     17                        already configured in the hardware, so its either the
     18                        reset default 0 or whatever the bootloader did.
     19
     20Example:
     21
     22spi1: spi@4000c400 { /* USART1 */
     23	#address-cells = <1>;
     24	#size-cells = <0>;
     25	compatible = "energymicro,efm32-spi";
     26	reg = <0x4000c400 0x400>;
     27	interrupts = <15 16>;
     28	clocks = <&cmu 20>;
     29	cs-gpios = <&gpio 51 1>; // D3
     30	energymicro,location = <1>;
     31
     32	ks8851@0 {
     33		compatible = "ks8851";
     34		spi-max-frequency = <6000000>;
     35		reg = <0>;
     36		interrupt-parent = <&boardfpga>;
     37		interrupts = <4>;
     38	};
     39};