cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-imx-cspi.yaml (2393B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX
      8
      9maintainers:
     10  - Shawn Guo <shawnguo@kernel.org>
     11
     12allOf:
     13  - $ref: "/schemas/spi/spi-controller.yaml#"
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - const: fsl,imx1-cspi
     19      - const: fsl,imx21-cspi
     20      - const: fsl,imx27-cspi
     21      - const: fsl,imx31-cspi
     22      - const: fsl,imx35-cspi
     23      - const: fsl,imx51-ecspi
     24      - const: fsl,imx53-ecspi
     25      - items:
     26          - enum:
     27              - fsl,imx50-ecspi
     28              - fsl,imx6q-ecspi
     29              - fsl,imx6sx-ecspi
     30              - fsl,imx6sl-ecspi
     31              - fsl,imx6sll-ecspi
     32              - fsl,imx6ul-ecspi
     33              - fsl,imx7d-ecspi
     34              - fsl,imx8mq-ecspi
     35              - fsl,imx8mm-ecspi
     36              - fsl,imx8mn-ecspi
     37              - fsl,imx8mp-ecspi
     38          - const: fsl,imx51-ecspi
     39
     40  reg:
     41    maxItems: 1
     42
     43  interrupts:
     44    maxItems: 1
     45
     46  clocks:
     47    items:
     48      - description: SoC SPI ipg clock
     49      - description: SoC SPI per clock
     50
     51  clock-names:
     52    items:
     53      - const: ipg
     54      - const: per
     55
     56  dmas:
     57    items:
     58      - description: DMA controller phandle and request line for RX
     59      - description: DMA controller phandle and request line for TX
     60
     61  dma-names:
     62    items:
     63      - const: rx
     64      - const: tx
     65
     66  fsl,spi-rdy-drctl:
     67    $ref: /schemas/types.yaml#/definitions/uint32
     68    description: |
     69      Integer, representing the value of DRCTL, the register controlling
     70      the SPI_READY handling. Note that to enable the DRCTL consideration,
     71      the SPI_READY mode-flag needs to be set too.
     72      Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
     73    enum: [0, 1, 2]
     74
     75required:
     76  - compatible
     77  - reg
     78  - interrupts
     79  - clocks
     80  - clock-names
     81
     82unevaluatedProperties: false
     83
     84examples:
     85  - |
     86    #include <dt-bindings/clock/imx5-clock.h>
     87
     88    spi@70010000 {
     89        #address-cells = <1>;
     90        #size-cells = <0>;
     91        compatible = "fsl,imx51-ecspi";
     92        reg = <0x70010000 0x4000>;
     93        interrupts = <36>;
     94        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
     95                 <&clks IMX5_CLK_ECSPI1_PER_GATE>;
     96        clock-names = "ipg", "per";
     97    };