cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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marvell,mmp2-ssp.yaml (1133B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: PXA2xx SSP SPI Controller bindings
      9
     10maintainers:
     11  - Lubomir Rintel <lkundrak@v3.sk>
     12
     13allOf:
     14  - $ref: spi-controller.yaml#
     15
     16properties:
     17  compatible:
     18    const: marvell,mmp2-ssp
     19
     20  interrupts:
     21    maxItems: 1
     22
     23  reg:
     24    maxItems: 1
     25
     26  clocks:
     27    maxItems: 1
     28
     29  ready-gpios:
     30    description: |
     31      GPIO used to signal a SPI master that the FIFO is filled and we're
     32      ready to service a transfer. Only useful in slave mode.
     33    maxItems: 1
     34
     35required:
     36  - compatible
     37  - reg
     38  - interrupts
     39  - clocks
     40
     41dependencies:
     42  ready-gpios: [ spi-slave ]
     43
     44unevaluatedProperties: false
     45
     46examples:
     47  - |
     48    #include <dt-bindings/clock/marvell,mmp2.h>
     49    spi@d4035000 {
     50        compatible = "marvell,mmp2-ssp";
     51        #address-cells = <1>;
     52        #size-cells = <0>;
     53        reg = <0xd4035000 0x1000>;
     54        clocks = <&soc_clocks MMP2_CLK_SSP0>;
     55        interrupts = <0>;
     56    };
     57
     58...