cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mediatek,spi-mt65xx.yaml (2859B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: SPI Bus controller for MediaTek ARM SoCs
      8
      9maintainers:
     10  - Leilk Liu <leilk.liu@mediatek.com>
     11
     12allOf:
     13  - $ref: "/schemas/spi/spi-controller.yaml#"
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - items:
     19          - enum:
     20              - mediatek,mt7629-spi
     21          - const: mediatek,mt7622-spi
     22      - items:
     23          - enum:
     24              - mediatek,mt8516-spi
     25          - const: mediatek,mt2712-spi
     26      - items:
     27          - enum:
     28              - mediatek,mt6779-spi
     29              - mediatek,mt8186-spi
     30              - mediatek,mt8192-spi
     31              - mediatek,mt8195-spi
     32          - const: mediatek,mt6765-spi
     33      - items:
     34          - enum:
     35              - mediatek,mt7986-spi-ipm
     36          - const: mediatek,spi-ipm
     37      - items:
     38          - enum:
     39              - mediatek,mt2701-spi
     40              - mediatek,mt2712-spi
     41              - mediatek,mt6589-spi
     42              - mediatek,mt6765-spi
     43              - mediatek,mt6893-spi
     44              - mediatek,mt7622-spi
     45              - mediatek,mt8135-spi
     46              - mediatek,mt8173-spi
     47              - mediatek,mt8183-spi
     48
     49  reg:
     50    maxItems: 1
     51
     52  interrupts:
     53    maxItems: 1
     54
     55  clocks:
     56    minItems: 3
     57    items:
     58      - description: clock used for the parent clock
     59      - description: clock used for the muxes clock
     60      - description: clock used for the clock gate
     61      - description: clock used for the AHB bus, this clock is optional
     62
     63  clock-names:
     64    minItems: 3
     65    items:
     66      - const: parent-clk
     67      - const: sel-clk
     68      - const: spi-clk
     69      - const: hclk
     70
     71  mediatek,pad-select:
     72    $ref: /schemas/types.yaml#/definitions/uint32-array
     73    minItems: 1
     74    maxItems: 4
     75    items:
     76      enum: [0, 1, 2, 3]
     77    description:
     78      specify which pins group(ck/mi/mo/cs) spi controller used.
     79      This is an array.
     80
     81required:
     82  - compatible
     83  - reg
     84  - interrupts
     85  - clocks
     86  - clock-names
     87  - '#address-cells'
     88  - '#size-cells'
     89
     90unevaluatedProperties: false
     91
     92examples:
     93  - |
     94    #include <dt-bindings/clock/mt8173-clk.h>
     95    #include <dt-bindings/gpio/gpio.h>
     96    #include <dt-bindings/interrupt-controller/arm-gic.h>
     97    #include <dt-bindings/interrupt-controller/irq.h>
     98
     99    spi@1100a000 {
    100      compatible = "mediatek,mt8173-spi";
    101      #address-cells = <1>;
    102      #size-cells = <0>;
    103      reg = <0x1100a000 0x1000>;
    104      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
    105      clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
    106               <&topckgen CLK_TOP_SPI_SEL>,
    107               <&pericfg CLK_PERI_SPI0>;
    108      clock-names = "parent-clk", "sel-clk", "spi-clk";
    109      cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
    110      mediatek,pad-select = <1>, <0>;
    111    };