cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,hspi.yaml (1141B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/renesas,hspi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas HSPI
      8
      9maintainers:
     10  - Geert Uytterhoeven <geert+renesas@glider.be>
     11
     12allOf:
     13  - $ref: spi-controller.yaml#
     14
     15properties:
     16  compatible:
     17    items:
     18      - enum:
     19          - renesas,hspi-r8a7778 # R-Car M1A
     20          - renesas,hspi-r8a7779 # R-Car H1
     21      - const: renesas,hspi
     22
     23  reg:
     24    maxItems: 1
     25
     26  interrupts:
     27    maxItems: 1
     28
     29  clocks:
     30    maxItems: 1
     31
     32  power-domains:
     33    maxItems: 1
     34
     35required:
     36  - compatible
     37  - reg
     38  - interrupts
     39  - clocks
     40  - '#address-cells'
     41  - '#size-cells'
     42
     43unevaluatedProperties: false
     44
     45examples:
     46  - |
     47    #include <dt-bindings/clock/r8a7778-clock.h>
     48    #include <dt-bindings/interrupt-controller/irq.h>
     49
     50    hspi0: spi@fffc7000 {
     51        compatible = "renesas,hspi-r8a7778", "renesas,hspi";
     52        reg = <0xfffc7000 0x18>;
     53        interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
     54        clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
     55        power-domains = <&cpg_clocks>;
     56        #address-cells = <1>;
     57        #size-cells = <0>;
     58    };