cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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socionext,uniphier-spi.yaml (1124B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/socionext,uniphier-spi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Socionext UniPhier SPI controller
      8
      9description: |
     10  UniPhier SoCs have SCSSI which supports SPI single channel.
     11
     12maintainers:
     13  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
     14  - Keiji Hayashibara <hayashibara.keiji@socionext.com>
     15
     16allOf:
     17  - $ref: spi-controller.yaml#
     18
     19properties:
     20  "#address-cells": true
     21  "#size-cells": true
     22
     23  compatible:
     24    const: socionext,uniphier-scssi
     25
     26  reg:
     27    maxItems: 1
     28
     29  interrupts:
     30    maxItems: 1
     31
     32  clocks:
     33    maxItems: 1
     34
     35  resets:
     36    maxItems: 1
     37
     38required:
     39  - compatible
     40  - reg
     41  - interrupts
     42  - clocks
     43  - resets
     44  - "#address-cells"
     45  - "#size-cells"
     46
     47unevaluatedProperties: false
     48
     49examples:
     50  - |
     51    spi0: spi@54006000 {
     52        compatible = "socionext,uniphier-scssi";
     53        reg = <0x54006000 0x100>;
     54        #address-cells = <1>;
     55        #size-cells = <0>;
     56        interrupts = <0 39 4>;
     57        clocks = <&peri_clk 11>;
     58        resets = <&peri_rst 11>;
     59    };