cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-armada-3700.txt (784B)

      1* Marvell Armada 3700 SPI Controller
      2
      3Required Properties:
      4
      5- compatible: should be "marvell,armada-3700-spi"
      6- reg: physical base address of the controller and length of memory mapped
      7       region.
      8- interrupts: The interrupt number. The interrupt specifier format depends on
      9	      the interrupt controller and of its driver.
     10- clocks: Must contain the clock source, usually from the North Bridge clocks.
     11- num-cs: The number of chip selects that is supported by this SPI Controller
     12- #address-cells: should be 1.
     13- #size-cells: should be 0.
     14
     15Example:
     16
     17	spi0: spi@10600 {
     18		compatible = "marvell,armada-3700-spi";
     19		#address-cells = <1>;
     20		#size-cells = <0>;
     21		reg = <0x10600 0x5d>;
     22		clocks = <&nb_perih_clk 7>;
     23		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
     24		num-cs = <4>;
     25	};