cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-bcm63xx-hsspi.txt (849B)


      1Binding for Broadcom BCM6328 High Speed SPI controller
      2
      3Required properties:
      4- compatible: must contain of "brcm,bcm6328-hsspi".
      5- reg: Base address and size of the controllers memory area.
      6- interrupts: Interrupt for the SPI block.
      7- clocks: phandles of the SPI clock and the PLL clock.
      8- clock-names: must be "hsspi", "pll".
      9- #address-cells: <1>, as required by generic SPI binding.
     10- #size-cells: <0>, also as required by generic SPI binding.
     11
     12Optional properties:
     13- num-cs: some controllers have less than 8 cs signals. Defaults to 8
     14  if absent.
     15
     16Child nodes as per the generic SPI binding.
     17
     18Example:
     19
     20	spi@10001000 {
     21		compatible = "brcm,bcm6328-hsspi";
     22		reg = <0x10001000 0x600>;
     23
     24		interrupts = <29>;
     25
     26		clocks = <&clkctl 9>, <&hsspi_pll>;
     27		clock-names = "hsspi", "pll";
     28
     29		num-cs = <2>;
     30
     31		#address-cells = <1>;
     32		#size-cells = <0>;
     33	};