cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-cadence.yaml (1340B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spi/spi-cadence.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Cadence SPI controller Device Tree Bindings
      8
      9maintainers:
     10  - Michal Simek <michal.simek@xilinx.com>
     11
     12allOf:
     13  - $ref: "spi-controller.yaml#"
     14
     15properties:
     16  compatible:
     17    enum:
     18      - cdns,spi-r1p6
     19      - xlnx,zynq-spi-r1p6
     20
     21  reg:
     22    maxItems: 1
     23
     24  interrupts:
     25    maxItems: 1
     26
     27  clock-names:
     28    items:
     29      - const: ref_clk
     30      - const: pclk
     31
     32  clocks:
     33    maxItems: 2
     34
     35  num-cs:
     36    description: |
     37      Number of chip selects used. If a decoder is used,
     38      this will be the number of chip selects after the
     39      decoder.
     40    $ref: /schemas/types.yaml#/definitions/uint32
     41    minimum: 1
     42    maximum: 4
     43    default: 4
     44
     45  is-decoded-cs:
     46    description: |
     47      Flag to indicate whether decoder is used or not.
     48    $ref: /schemas/types.yaml#/definitions/uint32
     49    enum: [ 0, 1 ]
     50    default: 0
     51
     52unevaluatedProperties: false
     53
     54examples:
     55  - |
     56    spi@e0007000 {
     57      compatible = "xlnx,zynq-spi-r1p6";
     58      clock-names = "ref_clk", "pclk";
     59      clocks = <&clkc 26>, <&clkc 35>;
     60      interrupt-parent = <&intc>;
     61      interrupts = <0 49 4>;
     62      num-cs = <4>;
     63      is-decoded-cs = <0>;
     64      reg = <0xe0007000 0x1000>;
     65    };
     66...