cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-mt7621.txt (666B)

      1Binding for MTK SPI controller (MT7621 MIPS)
      2
      3Required properties:
      4- compatible: Should be one of the following:
      5  - "ralink,mt7621-spi": for mt7621/mt7628/mt7688 platforms
      6- #address-cells: should be 1.
      7- #size-cells: should be 0.
      8- reg: Address and length of the register set for the device
      9- resets: phandle to the reset controller asserting this device in
     10          reset
     11  See ../reset/reset.txt for details.
     12
     13Optional properties:
     14- cs-gpios: see spi-bus.txt.
     15
     16Example:
     17
     18- SoC Specific Portion:
     19spi0: spi@b00 {
     20	compatible = "ralink,mt7621-spi";
     21	reg = <0xb00 0x100>;
     22	#address-cells = <1>;
     23	#size-cells = <0>;
     24	resets = <&rstctrl 18>;
     25	reset-names = "spi";
     26};