cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-sunplus-sp7021.yaml (1615B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2# Copyright (C) Sunplus Co., Ltd. 2021
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: Sunplus sp7021 SPI controller
      9
     10allOf:
     11  - $ref: "spi-controller.yaml"
     12
     13maintainers:
     14  - Li-hao Kuo <lhjeff911@gmail.com>
     15
     16properties:
     17  compatible:
     18    enum:
     19      - sunplus,sp7021-spi
     20
     21  reg:
     22    items:
     23      - description: the SPI master registers
     24      - description: the SPI slave registers
     25
     26  reg-names:
     27    items:
     28      - const: master
     29      - const: slave
     30
     31  interrupt-names:
     32    items:
     33      - const: dma_w
     34      - const: master_risc
     35      - const: slave_risc
     36
     37  interrupts:
     38    minItems: 3
     39
     40  clocks:
     41    maxItems: 1
     42
     43  resets:
     44    maxItems: 1
     45
     46required:
     47  - compatible
     48  - reg
     49  - reg-names
     50  - interrupts
     51  - interrupt-names
     52  - clocks
     53  - resets
     54  - pinctrl-names
     55  - pinctrl-0
     56
     57unevaluatedProperties: false
     58
     59examples:
     60  - |
     61    #include <dt-bindings/interrupt-controller/irq.h>
     62    spi@9C002D80 {
     63        compatible = "sunplus,sp7021-spi";
     64        reg = <0x9C002D80 0x80>, <0x9C002E00 0x80>;
     65        reg-names = "master", "slave";
     66        interrupt-parent = <&intc>;
     67        interrupt-names = "dma_w",
     68                          "master_risc",
     69                          "slave_risc";
     70        interrupts = <144 IRQ_TYPE_LEVEL_HIGH>,
     71                     <146 IRQ_TYPE_LEVEL_HIGH>,
     72                     <145 IRQ_TYPE_LEVEL_HIGH>;
     73        clocks = <&clkc 0x32>;
     74        resets = <&rstc 0x22>;
     75        pinctrl-names = "default";
     76        pinctrl-0 = <&pins_spi0>;
     77    };
     78...