cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sprd,spi-adi.yaml (3557B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Spreadtrum ADI controller
      9
     10maintainers:
     11  - Orson Zhai <orsonzhai@gmail.com>
     12  - Baolin Wang <baolin.wang7@gmail.com>
     13  - Chunyan Zhang <zhang.lyra@gmail.com>
     14
     15description: |
     16  ADI is the abbreviation of Anolog-Digital interface, which is used to access
     17  analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
     18  framework for its hardware implementation is alike to SPI bus and its timing
     19  is compatile to SPI timing.
     20
     21  ADI controller has 50 channels including 2 software read/write channels and
     22  48 hardware channels to access analog chip. For 2 software read/write channels,
     23  users should set ADI registers to access analog chip. For hardware channels,
     24  we can configure them to allow other hardware components to use it independently,
     25  which means we can just link one analog chip address to one hardware channel,
     26  then users can access the mapped analog chip address by this hardware channel
     27  triggered by hardware components instead of ADI software channels.
     28
     29  Thus we introduce one property named "sprd,hw-channels" to configure hardware
     30  channels, the first value specifies the hardware channel id which is used to
     31  transfer data triggered by hardware automatically, and the second value specifies
     32  the analog chip address where user want to access by hardware components.
     33
     34  Since we have multi-subsystems will use unique ADI to access analog chip, when
     35  one system is reading/writing data by ADI software channels, that should be under
     36  one hardware spinlock protection to prevent other systems from reading/writing
     37  data by ADI software channels at the same time, or two parallel routine of setting
     38  ADI registers will make ADI controller registers chaos to lead incorrect results.
     39  Then we need one hardware spinlock to synchronize between the multiple subsystems.
     40
     41  The new version ADI controller supplies multiple master channels for different
     42  subsystem accessing, that means no need to add hardware spinlock to synchronize,
     43  thus change the hardware spinlock support to be optional to keep backward
     44  compatibility.
     45
     46allOf:
     47  - $ref: /schemas/spi/spi-controller.yaml#
     48
     49properties:
     50  compatible:
     51    enum:
     52      - sprd,sc9860-adi
     53      - sprd,sc9863-adi
     54      - sprd,ums512-adi
     55
     56  reg:
     57    maxItems: 1
     58
     59  hwlocks:
     60    maxItems: 1
     61
     62  hwlock-names:
     63    const: adi
     64
     65  sprd,hw-channels:
     66    $ref: /schemas/types.yaml#/definitions/uint32-matrix
     67    description: A list of hardware channels
     68    minItems: 1
     69    maxItems: 48
     70    items:
     71      items:
     72        - description: The hardware channel id which is used to transfer data
     73            triggered by hardware automatically, channel id 0-1 are for software
     74            use, 2-49 are hardware channels.
     75          minimum: 2
     76          maximum: 49
     77        - description: The analog chip address where user want to access by
     78            hardware components.
     79
     80required:
     81  - compatible
     82  - reg
     83  - '#address-cells'
     84  - '#size-cells'
     85
     86unevaluatedProperties: false
     87
     88examples:
     89  - |
     90    aon {
     91        #address-cells = <2>;
     92        #size-cells = <2>;
     93
     94        adi_bus: spi@40030000 {
     95            compatible = "sprd,sc9860-adi";
     96            reg = <0 0x40030000 0 0x10000>;
     97            hwlocks = <&hwlock1 0>;
     98            hwlock-names = "adi";
     99            #address-cells = <1>;
    100            #size-cells = <0>;
    101            sprd,hw-channels = <30 0x8c20>;
    102        };
    103    };
    104...