cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sqi-pic32.txt (680B)

      1Microchip PIC32 Quad SPI controller
      2-----------------------------------
      3Required properties:
      4- compatible: Should be "microchip,pic32mzda-sqi".
      5- reg: Address and length of SQI controller register space.
      6- interrupts: Should contain SQI interrupt.
      7- clocks: Should contain phandle of two clocks in sequence, one that drives
      8          clock on SPI bus and other that drives SQI controller.
      9- clock-names: Should be "spi_ck" and "reg_ck" in order.
     10
     11Example:
     12	sqi1: spi@1f8e2000 {
     13		compatible = "microchip,pic32mzda-sqi";
     14		reg = <0x1f8e2000 0x200>;
     15		clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;
     16		clock-names = "spi_ck", "reg_ck";
     17		interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;
     18	};