cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hisilicon,hisi-spmi-controller.yaml (1689B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: HiSilicon SPMI controller
      8
      9maintainers:
     10  - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
     11
     12description: |
     13  The HiSilicon SPMI BUS controller is found on some Kirin-based designs.
     14  It is a MIPI System Power Management (SPMI) controller.
     15
     16  The PMIC part is provided by
     17  ./Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml.
     18
     19allOf:
     20  - $ref: spmi.yaml#
     21
     22properties:
     23
     24  $nodename:
     25    pattern: "spmi@[0-9a-f]"
     26
     27  compatible:
     28    const: hisilicon,kirin970-spmi-controller
     29
     30  reg:
     31    maxItems: 1
     32
     33  hisilicon,spmi-channel:
     34    $ref: /schemas/types.yaml#/definitions/uint32
     35    description: |
     36      number of the Kirin 970 SPMI channel where the SPMI devices are connected.
     37
     38required:
     39  - compatible
     40  - reg
     41  - hisilicon,spmi-channel
     42
     43patternProperties:
     44  "@[0-9a-f]$":
     45    type: object
     46
     47    description: |
     48      PMIC properties, which are specific to the used SPMI PMIC device(s).
     49      When used in combination with HiSilicon 6421v600, the properties
     50      are documented at
     51      drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml.
     52
     53unevaluatedProperties: false
     54
     55examples:
     56  - |
     57    bus {
     58      #address-cells = <2>;
     59      #size-cells = <2>;
     60
     61      spmi: spmi@fff24000 {
     62        compatible = "hisilicon,kirin970-spmi-controller";
     63        #address-cells = <2>;
     64        #size-cells = <0>;
     65        reg = <0x0 0xfff24000 0x0 0x1000>;
     66        hisilicon,spmi-channel = <2>;
     67
     68        pmic@0 {
     69          reg = <0 0>;
     70          /* pmic properties */
     71        };
     72      };
     73    };