cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spmi.yaml (1549B)


      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/spmi/spmi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: System Power Management Interface (SPMI) Controller
      8
      9maintainers:
     10  - Stephen Boyd <sboyd@kernel.org>
     11
     12description: |
     13  The System Power Management (SPMI) controller is a 2-wire bus defined
     14  by the MIPI Alliance for power management control to be used on SoC designs.
     15
     16  SPMI controllers are modelled in device tree using a generic set of
     17  bindings defined here, plus any bus controller specific properties, if
     18  needed.
     19
     20  Each SPMI controller has zero or more child nodes (up to 16 ones), each
     21  one representing an unique slave at the bus.
     22
     23properties:
     24  $nodename:
     25    pattern: "^spmi@.*"
     26
     27  "#address-cells":
     28    const: 2
     29
     30  "#size-cells":
     31    const: 0
     32
     33patternProperties:
     34  "@[0-9a-f]$":
     35    description: up to 16 child PMIC nodes
     36    type: object
     37
     38    properties:
     39      reg:
     40        items:
     41          - minItems: 1
     42            items:
     43              - minimum: 0
     44                maximum: 0xf
     45              - enum: [ 0 ]
     46                description:
     47                  0 means user ID address. 1 is reserved for group ID
     48                  address.
     49
     50    required:
     51      - reg
     52
     53required:
     54  - reg
     55
     56additionalProperties: true
     57
     58examples:
     59  - |
     60    #include <dt-bindings/spmi/spmi.h>
     61
     62    spmi@0 {
     63      reg = <0 0>;
     64
     65      #address-cells = <2>;
     66      #size-cells = <0>;
     67
     68      child@0 {
     69        reg = <0 SPMI_USID>;
     70      };
     71
     72      child@7 {
     73        reg = <7 SPMI_USID>;
     74      };
     75    };