cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx-thermal.yaml (3036B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: NXP i.MX Thermal Binding
      8
      9maintainers:
     10  - Shawn Guo <shawnguo@kernel.org>
     11  - Anson Huang <Anson.Huang@nxp.com>
     12
     13properties:
     14  compatible:
     15    enum:
     16      - fsl,imx6q-tempmon
     17      - fsl,imx6sx-tempmon
     18      - fsl,imx7d-tempmon
     19
     20  interrupts:
     21    description: |
     22      The interrupt output of the controller, i.MX6Q has IRQ_HIGH which
     23      will be triggered when temperature is higher than high threshold,
     24      i.MX6SX and i.MX7S/D have two more IRQs than i.MX6Q, one is IRQ_LOW
     25      and the other is IRQ_PANIC, when temperature is lower than low
     26      threshold, IRQ_LOW will be triggered, when temperature is higher
     27      than panic threshold, IRQ_PANIC will be triggered, and system can
     28      be configured to auto reboot by SRC module for IRQ_PANIC. IRQ_HIGH,
     29      IRQ_LOW and IRQ_PANIC share same interrupt output of controller.
     30    maxItems: 1
     31
     32  nvmem-cells:
     33    items:
     34      - description: Phandle to the calibration data provided by ocotp
     35      - description: Phandle to the temperature grade provided by ocotp
     36
     37  nvmem-cell-names:
     38    items:
     39      - const: calib
     40      - const: temp_grade
     41
     42  fsl,tempmon:
     43    $ref: '/schemas/types.yaml#/definitions/phandle'
     44    description: Phandle to anatop system controller node.
     45
     46  fsl,tempmon-data:
     47    $ref: '/schemas/types.yaml#/definitions/phandle'
     48    description: |
     49      Deprecated property, phandle pointer to fuse controller that contains
     50      TEMPMON calibration data, e.g. OCOTP on imx6q. The details about
     51      calibration data can be found in SoC Reference Manual.
     52    deprecated: true
     53
     54  clocks:
     55    maxItems: 1
     56
     57required:
     58  - compatible
     59  - interrupts
     60  - fsl,tempmon
     61  - nvmem-cells
     62  - nvmem-cell-names
     63
     64additionalProperties: false
     65
     66examples:
     67  - |
     68    #include <dt-bindings/clock/imx6sx-clock.h>
     69    #include <dt-bindings/interrupt-controller/arm-gic.h>
     70
     71    efuse@21bc000 {
     72         #address-cells = <1>;
     73         #size-cells = <1>;
     74         compatible = "fsl,imx6sx-ocotp", "syscon";
     75         reg = <0x021bc000 0x4000>;
     76         clocks = <&clks IMX6SX_CLK_OCOTP>;
     77
     78         tempmon_calib: calib@38 {
     79             reg = <0x38 4>;
     80         };
     81
     82         tempmon_temp_grade: temp-grade@20 {
     83             reg = <0x20 4>;
     84         };
     85    };
     86
     87    anatop@20c8000 {
     88        compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
     89        reg = <0x020c8000 0x1000>;
     90        interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
     91                     <0 54 IRQ_TYPE_LEVEL_HIGH>,
     92                     <0 127 IRQ_TYPE_LEVEL_HIGH>;
     93
     94        tempmon {
     95             compatible = "fsl,imx6sx-tempmon";
     96             interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
     97             fsl,tempmon = <&anatop>;
     98             nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
     99             nvmem-cell-names = "calib", "temp_grade";
    100             clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
    101        };
    102    };