cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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samsung,exynos-thermal.yaml (5043B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/thermal/samsung,exynos-thermal.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung Exynos SoC Thermal Management Unit (TMU)
      8
      9maintainers:
     10  - Krzysztof Kozlowski <krzk@kernel.org>
     11
     12description: |
     13  For multi-instance tmu each instance should have an alias correctly numbered
     14  in "aliases" node.
     15
     16properties:
     17  compatible:
     18    enum:
     19      - samsung,exynos3250-tmu
     20      - samsung,exynos4412-tmu
     21      - samsung,exynos4210-tmu
     22      - samsung,exynos5250-tmu
     23      - samsung,exynos5260-tmu
     24        # For TMU channel 0, 1 on Exynos5420:
     25      - samsung,exynos5420-tmu
     26        # For TMU channels 2, 3 and 4 of Exynos5420:
     27      - samsung,exynos5420-tmu-ext-triminfo
     28      - samsung,exynos5433-tmu
     29      - samsung,exynos7-tmu
     30
     31  clocks:
     32    minItems: 1
     33    maxItems: 3
     34
     35  clock-names:
     36    minItems: 1
     37    maxItems: 3
     38
     39  interrupts:
     40    description: |
     41      The Exynos TMU supports generating interrupts when reaching given
     42      temperature thresholds. Number of supported thermal trip points depends
     43      on the SoC (only first trip points defined in DT will be configured)::
     44       - most of SoC: 4
     45       - samsung,exynos5433-tmu: 8
     46       - samsung,exynos7-tmu: 8
     47    maxItems: 1
     48
     49  reg:
     50    items:
     51      - description: TMU instance registers.
     52      - description: |
     53          Shared TMU registers.
     54
     55          Note:: On Exynos5420, the TRIMINFO register is misplaced for TMU
     56          channels 2, 3 and 4 Use "samsung,exynos5420-tmu-ext-triminfo" in
     57          cases, there is a misplaced register, also provide clock to access
     58          that base.
     59          TRIMINFO at 0x1006c000 contains data for TMU channel 3
     60          TRIMINFO at 0x100a0000 contains data for TMU channel 4
     61          TRIMINFO at 0x10068000 contains data for TMU channel 2
     62    minItems: 1
     63
     64  '#thermal-sensor-cells': true
     65
     66  vtmu-supply:
     67    description: The regulator node supplying voltage to TMU.
     68
     69required:
     70  - compatible
     71  - clocks
     72  - clock-names
     73  - interrupts
     74  - reg
     75
     76allOf:
     77  - $ref: /schemas/thermal/thermal-sensor.yaml
     78  - if:
     79      properties:
     80        compatible:
     81          contains:
     82            const: samsung,exynos5420-tmu-ext-triminfo
     83    then:
     84      properties:
     85        clocks:
     86          items:
     87            - description:
     88                Operational clock for TMU channel.
     89            - description:
     90                Optional clock to access the shared registers (e.g. TRIMINFO) of TMU
     91                channel.
     92        clock-names:
     93          items:
     94            - const: tmu_apbif
     95            - const: tmu_triminfo_apbif
     96        reg:
     97          minItems: 2
     98          maxItems: 2
     99  - if:
    100      properties:
    101        compatible:
    102          contains:
    103            enum:
    104              - samsung,exynos5433-tmu
    105              - samsung,exynos7-tmu
    106    then:
    107      properties:
    108        clocks:
    109          items:
    110            - description:
    111                Operational clock for TMU channel.
    112            - description:
    113                Optional special clock for functional operation of TMU channel.
    114        clock-names:
    115          items:
    116            - const: tmu_apbif
    117            - const: tmu_sclk
    118        reg:
    119          minItems: 1
    120          maxItems: 1
    121
    122  - if:
    123      properties:
    124        compatible:
    125          contains:
    126            enum:
    127              - samsung,exynos3250-tmu
    128              - samsung,exynos4412-tmu
    129              - samsung,exynos4210-tmu
    130              - samsung,exynos5250-tmu
    131              - samsung,exynos5260-tmu
    132              - samsung,exynos5420-tmu
    133    then:
    134      properties:
    135        clocks:
    136          minItems: 1
    137          maxItems: 1
    138        reg:
    139          minItems: 1
    140          maxItems: 1
    141
    142additionalProperties: false
    143
    144examples:
    145  - |
    146    #include <dt-bindings/clock/exynos4.h>
    147
    148    tmu@100c0000 {
    149        compatible = "samsung,exynos4412-tmu";
    150        reg = <0x100C0000 0x100>;
    151        interrupt-parent = <&combiner>;
    152        interrupts = <2 4>;
    153        #thermal-sensor-cells = <0>;
    154        clocks = <&clock CLK_TMU_APBIF>;
    155        clock-names = "tmu_apbif";
    156        vtmu-supply = <&ldo10_reg>;
    157    };
    158
    159  - |
    160    #include <dt-bindings/interrupt-controller/arm-gic.h>
    161
    162    tmu@10068000 {
    163        compatible = "samsung,exynos5420-tmu-ext-triminfo";
    164        reg = <0x10068000 0x100>, <0x1006c000 0x4>;
    165        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
    166        #thermal-sensor-cells = <0>;
    167        clocks = <&clock 318>, <&clock 318>; /* CLK_TMU */
    168        clock-names = "tmu_apbif", "tmu_triminfo_apbif";
    169        vtmu-supply = <&ldo7_reg>;
    170    };
    171
    172  - |
    173    #include <dt-bindings/interrupt-controller/arm-gic.h>
    174
    175    tmu@10060000 {
    176        compatible = "samsung,exynos5433-tmu";
    177        reg = <0x10060000 0x200>;
    178        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
    179        #thermal-sensor-cells = <0>;
    180        clocks = <&cmu_peris 3>, /* CLK_PCLK_TMU0_APBIF */
    181                 <&cmu_peris 35>; /* CLK_SCLK_TMU0 */
    182        clock-names = "tmu_apbif", "tmu_sclk";
    183        vtmu-supply = <&ldo3_reg>;
    184    };