cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

renesas,mtu2.yaml (1796B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/timer/renesas,mtu2.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas Multi-Function Timer Pulse Unit 2 (MTU2)
      8
      9maintainers:
     10  - Geert Uytterhoeven <geert+renesas@glider.be>
     11  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
     12
     13description:
     14  The MTU2 is a multi-purpose, multi-channel timer/counter with configurable clock inputs
     15  and programmable compare match.
     16
     17  Channels share hardware resources but their counter and compare match value are
     18  independent. The MTU2 hardware supports five channels indexed from 0 to 4.
     19
     20properties:
     21  compatible:
     22    items:
     23      - enum:
     24          - renesas,mtu2-r7s72100 # RZ/A1H
     25      - const: renesas,mtu2
     26
     27  reg:
     28    maxItems: 1
     29
     30  interrupts:
     31    minItems: 1
     32    maxItems: 5
     33    description: One entry for each enabled channel.
     34
     35  interrupt-names:
     36    minItems: 1
     37    items:
     38      - const: tgi0a
     39      - const: tgi1a
     40      - const: tgi2a
     41      - const: tgi3a
     42      - const: tgi4a
     43
     44  clocks:
     45    maxItems: 1
     46
     47  clock-names:
     48    const: fck
     49
     50  power-domains:
     51    maxItems: 1
     52
     53required:
     54  - compatible
     55  - reg
     56  - interrupts
     57  - interrupt-names
     58  - clocks
     59  - clock-names
     60  - power-domains
     61
     62additionalProperties: false
     63
     64examples:
     65  - |
     66    #include <dt-bindings/clock/r7s72100-clock.h>
     67    #include <dt-bindings/interrupt-controller/arm-gic.h>
     68    mtu2: timer@fcff0000 {
     69            compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
     70            reg = <0xfcff0000 0x400>;
     71            interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
     72            interrupt-names = "tgi0a";
     73            clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
     74            clock-names = "fck";
     75            power-domains = <&cpg_clocks>;
     76    };