cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ehci-st.txt (1380B)

      1ST USB EHCI controller
      2
      3Required properties:
      4 - compatible		: must be "st,st-ehci-300x"
      5 - reg			: physical base addresses of the controller and length of memory mapped
      6			  region
      7 - interrupts		: one EHCI interrupt should be described here
      8 - pinctrl-names	: a pinctrl state named "default" must be defined
      9 - pinctrl-0		: phandle referencing pin configuration of the USB controller
     10See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
     11 - clocks		: phandle list of usb clocks
     12 - clock-names		: should be "ic" for interconnect clock and "clk48"
     13See: Documentation/devicetree/bindings/clock/clock-bindings.txt
     14
     15 - phys			: phandle for the PHY device
     16 - phy-names		: should be "usb"
     17 - resets		: phandle + reset specifier pairs to the powerdown and softreset lines
     18			  of the USB IP
     19 - reset-names		: should be "power" and "softreset"
     20See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
     21See: Documentation/devicetree/bindings/reset/reset.txt
     22
     23Example:
     24
     25	ehci1: usb@fe203e00 {
     26		compatible = "st,st-ehci-300x";
     27		reg = <0xfe203e00 0x100>;
     28		interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
     29		pinctrl-names = "default";
     30		pinctrl-0 = <&pinctrl_usb1>;
     31		clocks = <&clk_s_a1_ls 0>;
     32		phys = <&usb2_phy>;
     33		phy-names = "usb";
     34
     35		resets = <&powerdown STIH416_USB1_POWERDOWN>,
     36			 <&softreset STIH416_USB1_SOFTRESET>;
     37		reset-names = "power", "softreset";
     38	};