cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mediatek,mtu3.yaml (10081B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2# Copyright (c) 2020 MediaTek
      3%YAML 1.2
      4---
      5$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
      6$schema: http://devicetree.org/meta-schemas/core.yaml#
      7
      8title: MediaTek USB3 DRD Controller Device Tree Bindings
      9
     10maintainers:
     11  - Chunfeng Yun <chunfeng.yun@mediatek.com>
     12
     13allOf:
     14  - $ref: "usb-drd.yaml"
     15
     16description: |
     17  The DRD controller has a glue layer IPPC (IP Port Control), and its host is
     18  based on xHCI.
     19
     20properties:
     21  compatible:
     22    items:
     23      - enum:
     24          - mediatek,mt2712-mtu3
     25          - mediatek,mt8173-mtu3
     26          - mediatek,mt8183-mtu3
     27          - mediatek,mt8192-mtu3
     28          - mediatek,mt8195-mtu3
     29      - const: mediatek,mtu3
     30
     31  reg:
     32    items:
     33      - description: the registers of device MAC
     34      - description: the registers of IP Port Control
     35
     36  reg-names:
     37    items:
     38      - const: mac
     39      - const: ippc
     40
     41  interrupts:
     42    description:
     43      use "interrupts-extended" when the interrupts are connected to the
     44      separate interrupt controllers
     45    minItems: 1
     46    items:
     47      - description: SSUSB device controller interrupt
     48      - description: optional, wakeup interrupt used to support runtime PM
     49
     50  interrupt-names:
     51    items:
     52      - const: device
     53      - const: wakeup
     54
     55  power-domains:
     56    description: A phandle to USB power domain node to control USB's MTCMOS
     57    maxItems: 1
     58
     59  clocks:
     60    minItems: 1
     61    items:
     62      - description: Controller clock used by normal mode
     63      - description: Reference clock used by low power mode etc
     64      - description: Mcu bus clock for register access
     65      - description: DMA bus clock for data transfer
     66
     67  clock-names:
     68    minItems: 1
     69    items:
     70      - const: sys_ck  # required, others are optional
     71      - const: ref_ck
     72      - const: mcu_ck
     73      - const: dma_ck
     74
     75  phys:
     76    description:
     77      List of all the USB PHYs used, it's better to keep the sequence
     78      as the hardware layout.
     79    minItems: 1
     80    items:
     81      - description: USB2/HS PHY    # required, others are optional
     82      - description: USB3/SS(P) PHY
     83      - description: USB2/HS PHY    # the following for backward compatible
     84      - description: USB3/SS(P) PHY
     85      - description: USB2/HS PHY
     86      - description: USB3/SS(P) PHY
     87      - description: USB2/HS PHY
     88      - description: USB3/SS(P) PHY
     89      - description: USB2/HS PHY
     90
     91  vusb33-supply:
     92    description: Regulator of USB AVDD3.3v
     93
     94  vbus-supply:
     95    deprecated: true
     96    description: |
     97      Regulator of USB VBUS5v, needed when supports dual-role mode.
     98      Particularly, if use an output GPIO to control a VBUS regulator, should
     99      model it as a regulator. See bindings/regulator/fixed-regulator.yaml
    100      It's considered valid for compatibility reasons, not allowed for
    101      new bindings, and put into a usb-connector node.
    102
    103  dr_mode:
    104    enum: [host, peripheral, otg]
    105    default: otg
    106
    107  maximum-speed:
    108    enum: [super-speed-plus, super-speed, high-speed, full-speed]
    109
    110  "#address-cells":
    111    enum: [1, 2]
    112
    113  "#size-cells":
    114    enum: [1, 2]
    115
    116  ranges: true
    117
    118  extcon:
    119    deprecated: true
    120    description: |
    121      Phandle to the extcon device detecting the IDDIG state, needed
    122      when supports dual-role mode.
    123      It's considered valid for compatibility reasons, not allowed for
    124      new bindings, and use "usb-role-switch" property instead.
    125
    126  usb-role-switch:
    127    $ref: /schemas/types.yaml#/definitions/flag
    128    description: Support role switch.
    129    type: boolean
    130
    131  role-switch-default-mode:
    132    enum: [host, peripheral]
    133    default: host
    134
    135  connector:
    136    $ref: /schemas/connector/usb-connector.yaml#
    137    description:
    138      Connector for dual role switch, especially for "gpio-usb-b-connector"
    139    type: object
    140
    141  port:
    142    description:
    143      Any connector to the data bus of this controller should be modelled
    144      using the OF graph bindings specified, if the "usb-role-switch"
    145      property is used. See graph.txt
    146    $ref: /schemas/graph.yaml#/properties/port
    147
    148  enable-manual-drd:
    149    $ref: /schemas/types.yaml#/definitions/flag
    150    description:
    151      supports manual dual-role switch via debugfs; usually used when
    152      receptacle is TYPE-A and also wants to support dual-role mode.
    153    type: boolean
    154
    155  wakeup-source:
    156    description: enable USB remote wakeup, see power/wakeup-source.txt
    157    type: boolean
    158
    159  mediatek,syscon-wakeup:
    160    $ref: /schemas/types.yaml#/definitions/phandle-array
    161    maxItems: 1
    162    description:
    163      A phandle to syscon used to access the register of the USB wakeup glue
    164      layer between xHCI and SPM, the field should always be 3 cells long.
    165    items:
    166      items:
    167        - description:
    168            The first cell represents a phandle to syscon
    169        - description:
    170            The second cell represents the register base address of the glue
    171            layer in syscon
    172        - description: |
    173            The third cell represents the hardware version of the glue layer,
    174            1 - used by mt8173 etc, revision 1 without following IPM rule;
    175            2 - used by mt2712 etc, revision 2 with following IPM rule;
    176            101 - used by mt8183, specific 1.01;
    177            102 - used by mt8192, specific 1.02;
    178          enum: [1, 2, 101, 102]
    179
    180  mediatek,u3p-dis-msk:
    181    $ref: /schemas/types.yaml#/definitions/uint32
    182    description: The mask to disable u3ports, bit0 for u3port0,
    183      bit1 for u3port1, ... etc
    184
    185  mediatek,u2p-dis-msk:
    186    $ref: /schemas/types.yaml#/definitions/uint32
    187    description: The mask to disable u2ports, bit0 for u2port0,
    188      bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
    189      is enabled, so will be skipped in this case.
    190
    191# Required child node when support dual-role
    192patternProperties:
    193  "^usb@[0-9a-f]+$":
    194    type: object
    195    $ref: /schemas/usb/mediatek,mtk-xhci.yaml#
    196    description:
    197      The xhci should be added as subnode to mtu3 as shown in the following
    198      example if the host mode is enabled.
    199
    200dependencies:
    201  connector: [ 'usb-role-switch' ]
    202  port: [ 'usb-role-switch' ]
    203  role-switch-default-mode: [ 'usb-role-switch' ]
    204  wakeup-source: [ 'mediatek,syscon-wakeup' ]
    205
    206required:
    207  - compatible
    208  - reg
    209  - reg-names
    210  - interrupts
    211  - clocks
    212  - clock-names
    213
    214additionalProperties: false
    215
    216examples:
    217  # Dual role switch by extcon
    218  - |
    219    #include <dt-bindings/clock/mt8173-clk.h>
    220    #include <dt-bindings/interrupt-controller/arm-gic.h>
    221    #include <dt-bindings/interrupt-controller/irq.h>
    222    #include <dt-bindings/phy/phy.h>
    223    #include <dt-bindings/power/mt8173-power.h>
    224
    225    usb@11271000 {
    226        compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
    227        reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
    228        reg-names = "mac", "ippc";
    229        interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
    230        phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
    231        power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
    232        clocks = <&topckgen CLK_TOP_USB30_SEL>;
    233        clock-names = "sys_ck";
    234        vusb33-supply = <&mt6397_vusb_reg>;
    235        vbus-supply = <&usb_p0_vbus>;
    236        extcon = <&extcon_usb>;
    237        dr_mode = "otg";
    238        wakeup-source;
    239        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
    240        #address-cells = <1>;
    241        #size-cells = <1>;
    242        ranges;
    243
    244        xhci: usb@11270000 {
    245            compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
    246            reg = <0x11270000 0x1000>;
    247            reg-names = "mac";
    248            interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
    249            power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
    250            clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
    251            clock-names = "sys_ck", "ref_ck";
    252            vusb33-supply = <&mt6397_vusb_reg>;
    253        };
    254    };
    255
    256  # Dual role switch by gpio-usb-b-connector
    257  - |
    258    #include <dt-bindings/gpio/gpio.h>
    259    #include <dt-bindings/power/mt2712-power.h>
    260
    261    usb@112c1000 {
    262        compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
    263        reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
    264        reg-names = "mac", "ippc";
    265        interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
    266        phys = <&u2port2 PHY_TYPE_USB2>;
    267        power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
    268        clocks = <&topckgen CLK_TOP_USB30_SEL>;
    269        clock-names = "sys_ck";
    270        dr_mode = "otg";
    271        usb-role-switch;
    272        #address-cells = <1>;
    273        #size-cells = <1>;
    274        ranges;
    275
    276        host0: usb@11270000 {
    277            compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
    278            reg = <0x11270000 0x1000>;
    279            reg-names = "mac";
    280            interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
    281            power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
    282            clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
    283            clock-names = "sys_ck", "ref_ck";
    284        };
    285
    286        connector {
    287            compatible = "gpio-usb-b-connector", "usb-b-connector";
    288            type = "micro";
    289            id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
    290            vbus-supply = <&usb_p0_vbus>;
    291        };
    292    };
    293
    294  # Dual role switch with type-c
    295  - |
    296    usb@11201000 {
    297        compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
    298        reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
    299        reg-names = "mac", "ippc";
    300        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
    301        phys = <&u2port0 PHY_TYPE_USB2>;
    302        clocks = <&clk26m>;
    303        clock-names = "sys_ck";
    304        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
    305        wakeup-source;
    306        dr_mode = "otg";
    307        usb-role-switch;
    308        role-switch-default-mode = "host";
    309        #address-cells = <1>;
    310        #size-cells = <1>;
    311        ranges;
    312
    313        host: usb@11200000 {
    314            compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
    315            reg = <0x11200000 0x1000>;
    316            reg-names = "mac";
    317            interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
    318            clocks = <&clk26m>;
    319            clock-names = "sys_ck";
    320        };
    321
    322        port {
    323            usb_role_sw: endpoint {
    324                remote-endpoint = <&hs_ep>;
    325            };
    326        };
    327    };
    328
    329...