cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pxa-usb.txt (1527B)

      1PXA USB controllers
      2
      3OHCI
      4
      5Required properties:
      6 - compatible: Should be "marvell,pxa-ohci" for USB controllers
      7   used in host mode.
      8
      9Optional properties:
     10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
     11   If present, enables the appropriate USB port of the controller.
     12 - "marvell,port-mode" selects the mode of the ports:
     13	1 = PMM_NPS_MODE
     14	2 = PMM_GLOBAL_MODE
     15	3 = PMM_PERPORT_MODE
     16 - "marvell,power-sense-low" - power sense pin is low-active.
     17 - "marvell,power-control-low" - power control pin is low-active.
     18 - "marvell,no-oc-protection" - disable over-current protection.
     19 - "marvell,oc-mode-perport" - enable per-port over-current protection.
     20 - "marvell,power_on_delay" Power On to Power Good time - in ms.
     21
     22Example:
     23
     24	usb0: ohci@4c000000 {
     25		compatible = "marvell,pxa-ohci", "usb-ohci";
     26		reg = <0x4c000000 0x100000>;
     27		interrupts = <18>;
     28		marvell,enable-port1;
     29		marvell,port-mode = <2>; /* PMM_GLOBAL_MODE */
     30	};
     31
     32UDC
     33
     34Required properties:
     35 - compatible: Should be "marvell,pxa270-udc" for USB controllers
     36   used in device mode.
     37 - reg: usb device MMIO address space
     38 - interrupts: single interrupt generated by the UDC IP
     39 - clocks: input clock of the UDC IP (see clock-bindings.txt)
     40
     41Optional properties:
     42 - gpios:
     43   - gpio activated to control the USB D+ pullup (see gpio.txt)
     44
     45Example:
     46
     47		pxa27x_udc: udc@40600000 {
     48			compatible = "marvell,pxa270-udc";
     49			reg = <0x40600000 0x10000>;
     50			interrupts = <11>;
     51			clocks = <&pxa2xx_clks 11>;
     52			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
     53		};