cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,am62-usb.yaml (2528B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
      8
      9maintainers:
     10  - Aswath Govindraju <a-govindraju@ti.com>
     11
     12properties:
     13  compatible:
     14    const: ti,am62-usb
     15
     16  reg:
     17    maxItems: 1
     18
     19  ranges: true
     20
     21  power-domains:
     22    description:
     23      PM domain provider node and an args specifier containing
     24      the USB ISO device id value. See,
     25      Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
     26    maxItems: 1
     27
     28  clocks:
     29    description: Clock phandle to usb2_refclk
     30    maxItems: 1
     31
     32  clock-names:
     33    items:
     34      - const: ref
     35
     36  ti,vbus-divider:
     37    description:
     38      Should be present if USB VBUS line is connected to the
     39      VBUS pin of the SoC via a 1/3 voltage divider.
     40    type: boolean
     41
     42  ti,syscon-phy-pll-refclk:
     43    $ref: /schemas/types.yaml#/definitions/phandle-array
     44    items:
     45      - items:
     46          - description: Phandle to the SYSCON entry
     47          - description: USB phy control register offset within SYSCON
     48    description:
     49      Specifier for conveying frequency of ref clock input, for the
     50      operation of USB2PHY.
     51
     52  '#address-cells':
     53    const: 2
     54
     55  '#size-cells':
     56    const: 2
     57
     58patternProperties:
     59  "^usb@[0-9a-f]+$":
     60    $ref: snps,dwc3.yaml#
     61    description: Required child node
     62
     63required:
     64  - compatible
     65  - reg
     66  - power-domains
     67  - clocks
     68  - clock-names
     69  - ti,syscon-phy-pll-refclk
     70
     71additionalProperties: false
     72
     73examples:
     74  - |
     75    #include <dt-bindings/soc/ti,sci_pm_domain.h>
     76    #include <dt-bindings/interrupt-controller/arm-gic.h>
     77    #include <dt-bindings/gpio/gpio.h>
     78
     79    bus {
     80      #address-cells = <2>;
     81      #size-cells = <2>;
     82
     83      usbss1: usb@f910000 {
     84        compatible = "ti,am62-usb";
     85        reg = <0x00 0x0f910000 0x00 0x800>;
     86        clocks = <&k3_clks 162 3>;
     87        clock-names = "ref";
     88        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
     89        power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
     90        #address-cells = <2>;
     91        #size-cells = <2>;
     92
     93        usb@31100000 {
     94          compatible = "snps,dwc3";
     95          reg =<0x00 0x31100000 0x00 0x50000>;
     96          interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
     97                       <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
     98          interrupt-names = "host", "peripheral";
     99          maximum-speed = "high-speed";
    100          dr_mode = "otg";
    101        };
    102      };
    103    };