cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-imx-owire.yaml (904B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/w1/fsl-imx-owire.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale i.MX One wire bus master controller
      8
      9maintainers:
     10  - Martin Fuzzey <mfuzzey@parkeon.com>
     11
     12properties:
     13  compatible:
     14    oneOf:
     15      - const: fsl,imx21-owire
     16      - items:
     17          - enum:
     18              - fsl,imx27-owire
     19              - fsl,imx50-owire
     20              - fsl,imx51-owire
     21              - fsl,imx53-owire
     22          - const: fsl,imx21-owire
     23
     24  reg:
     25    maxItems: 1
     26
     27  clocks:
     28    maxItems: 1
     29
     30required:
     31  - compatible
     32  - reg
     33
     34additionalProperties: false
     35
     36examples:
     37  - |
     38    #include <dt-bindings/clock/imx5-clock.h>
     39
     40    owire@63fa4000 {
     41        compatible = "fsl,imx53-owire", "fsl,imx21-owire";
     42        reg = <0x63fa4000 0x4000>;
     43        clocks = <&clks IMX5_CLK_OWIRE_GATE>;
     44    };